From 1725703a1d37e44464bd988da0bca060afa82207 Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 4 Jun 2009 20:18:42 +0000 Subject: The point of the patch is to make it easier to understand the raminit code, specifically the difference between pre_f and f code. The only functional changes are in printk statements. The rest is white space. 1. Remove some #if 0 and #if 1 blocks 2. Remove #if USE_DCACHE_RAM blocks. All K8 boards use CAR. 2. Correct typos (canidate -> candidate) 3. Try to minimize the differences between amdk8_f.h and amdk8_pre_f.h 4. Try to minimize the differences between raminit.c and raminit_f.c 5. Make boards that have rev_f processors include the correct raminit code There is much more that could be done, but it's a start. Abuild tested and boot tested on s2892 and serengeti_cheetah. Signed-off-by: Myles Watson Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/amd/dbm690t/cache_as_ram_auto.c | 2 +- src/mainboard/amd/pistachio/cache_as_ram_auto.c | 2 +- src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c | 2 +- src/mainboard/technexion/tim8690/cache_as_ram_auto.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c index a1e6d99e4d..29cdfb37f7 100644 --- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c +++ b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c @@ -86,7 +86,7 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "northbridge/amd/amdk8/raminit.c" +#include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" #include "resourcemap.c" diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c index 5aaf399583..ade2024355 100644 --- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c +++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c @@ -80,7 +80,7 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "northbridge/amd/amdk8/raminit.c" +#include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" #include "resourcemap.c" diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c index 0df32db32c..95a3395abe 100644 --- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c +++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c @@ -124,7 +124,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "northbridge/amd/amdk8/raminit.c" +#include "northbridge/amd/amdk8/raminit_f.c" #include "sdram/generic_sdram.c" diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c index 503bc85495..7d60c2703c 100644 --- a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c +++ b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c @@ -86,7 +86,7 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "northbridge/amd/amdk8/raminit.c" +#include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" #include "resourcemap.c" -- cgit v1.2.3