From 166b35210ca00ca15a01aa7551eb47b010a808ac Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 16 Feb 2022 15:23:15 +0530 Subject: mb/google/brya/var/{gimble, gimble4es}: Fix PLD group order In ec/google/chromeec: Add PLD to EC conn in ACPI table (667471b8d807da5a5a9277db47e069ad3b1351c7), PLD is added to ACPI table. This patch ensures USB _PLD group numbers are appear in order. BUG=b:216490477 TEST=build coreboot and system boot into OS. Signed-off-by: Subrata Banik Change-Id: I4e051b21ca55d25c6fc6cfb529078b18adaab2cb Reviewed-on: https://review.coreboot.org/c/coreboot/+/62028 Reviewed-by: EricR Lai Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/gimble/overridetree.cb | 4 ++-- src/mainboard/google/brya/variants/gimble4es/overridetree.cb | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index e13d66ab62..5ecf9ccc9f 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -330,7 +330,7 @@ chip soc/intel/alderlake .panel = PLD_PANEL_RIGHT, .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(4, 1)}" + .group = ACPI_PLD_GROUP(3, 1)}" device ref usb2_port8 on end end chip drivers/usb/acpi @@ -349,7 +349,7 @@ chip soc/intel/alderlake .panel = PLD_PANEL_RIGHT, .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(4, 1)}" + .group = ACPI_PLD_GROUP(3, 1)}" device ref usb3_port2 on end end end diff --git a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb index d7a000cac8..d7ae9f3d8e 100644 --- a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb @@ -298,7 +298,7 @@ chip soc/intel/alderlake .panel = PLD_PANEL_RIGHT, .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(4, 1)}" + .group = ACPI_PLD_GROUP(3, 1)}" device ref usb2_port8 on end end chip drivers/usb/acpi @@ -317,7 +317,7 @@ chip soc/intel/alderlake .panel = PLD_PANEL_RIGHT, .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(4, 1)}" + .group = ACPI_PLD_GROUP(3, 1)}" device ref usb3_port2 on end end end -- cgit v1.2.3