From 14e22779625de673569c7b950ecc2753fb915b31 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 27 Apr 2010 06:56:47 +0000 Subject: Since some people disapprove of white space cleanups mixed in regular commits while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/a-trend/Kconfig | 2 +- src/mainboard/abit/Kconfig | 2 +- src/mainboard/amd/rumba/devicetree.cb | 2 +- src/mainboard/amd/rumba/irq_tables.c | 2 +- src/mainboard/amd/rumba/mainboard.c | 2 +- src/mainboard/amd/rumba/romstage.c | 8 +- .../amd/serengeti_cheetah/acpi/amd8111.asl | 26 +-- .../amd/serengeti_cheetah/acpi/amd8111_isa.asl | 10 +- .../amd/serengeti_cheetah/acpi/amd8131.asl | 80 ++++---- .../amd/serengeti_cheetah/acpi/amd8131_2.asl | 30 +-- .../amd/serengeti_cheetah/acpi/amd8132_2.asl | 30 +-- .../amd/serengeti_cheetah/acpi/amd8151.asl | 14 +- src/mainboard/amd/serengeti_cheetah/ap_romstage.c | 2 +- src/mainboard/amd/serengeti_cheetah/devicetree.cb | 6 +- src/mainboard/amd/serengeti_cheetah/dsdt.asl | 10 +- src/mainboard/amd/serengeti_cheetah/fadt.c | 6 +- src/mainboard/amd/serengeti_cheetah/get_bus_conf.c | 16 +- src/mainboard/amd/serengeti_cheetah/irq_tables.c | 24 +-- src/mainboard/amd/serengeti_cheetah/mptable.c | 4 +- .../amd/serengeti_cheetah/readme_acpi.txt | 6 +- src/mainboard/amd/serengeti_cheetah/resourcemap.c | 6 +- src/mainboard/amd/serengeti_cheetah/romstage.c | 16 +- src/mainboard/amd/serengeti_cheetah/ssdt2.asl | 8 +- src/mainboard/amd/serengeti_cheetah/ssdt3.asl | 8 +- src/mainboard/amd/serengeti_cheetah/ssdt4.asl | 8 +- src/mainboard/arima/Kconfig | 2 +- src/mainboard/arima/hdama/debug.c | 18 +- src/mainboard/arima/hdama/devicetree.cb | 44 ++--- src/mainboard/arima/hdama/irq_tables.c | 2 +- src/mainboard/arima/hdama/mptable.c | 10 +- src/mainboard/artecgroup/Kconfig | 2 +- src/mainboard/artecgroup/dbe61/spd_table.h | 2 +- src/mainboard/asus/a8n_e/irq_tables.c | 2 +- src/mainboard/asus/a8v-e_se/acpi_tables.c | 4 +- src/mainboard/asus/a8v-e_se/romstage.c | 4 +- src/mainboard/asus/m2v-mx_se/acpi_tables.c | 4 +- src/mainboard/asus/m2v-mx_se/dsdt.asl | 6 +- src/mainboard/asus/m2v-mx_se/romstage.c | 2 +- src/mainboard/asus/mew-vm/devicetree.cb | 2 +- src/mainboard/asus/mew-vm/irq_tables.c | 4 +- src/mainboard/azza/Kconfig | 2 +- src/mainboard/biostar/Kconfig | 2 +- src/mainboard/broadcom/Kconfig | 2 +- src/mainboard/broadcom/blast/devicetree.cb | 6 +- src/mainboard/broadcom/blast/get_bus_conf.c | 8 +- src/mainboard/broadcom/blast/irq_tables.c | 18 +- src/mainboard/broadcom/blast/mptable.c | 18 +- src/mainboard/broadcom/blast/resourcemap.c | 14 +- src/mainboard/broadcom/blast/romstage.c | 12 +- src/mainboard/compaq/Kconfig | 2 +- src/mainboard/dell/s1850/debug.c | 58 +++--- src/mainboard/dell/s1850/devicetree.cb | 24 +-- src/mainboard/dell/s1850/irq_tables.c | 4 +- src/mainboard/dell/s1850/mptable.c | 8 +- src/mainboard/dell/s1850/romstage.c | 30 +-- src/mainboard/dell/s1850/s1850_fixups.c | 10 +- src/mainboard/dell/s1850/watchdog.c | 6 +- src/mainboard/digitallogic/Kconfig | 2 +- src/mainboard/digitallogic/adl855pc/devicetree.cb | 4 +- src/mainboard/digitallogic/adl855pc/irq_tables.c | 2 +- src/mainboard/digitallogic/adl855pc/romstage.c | 8 +- src/mainboard/digitallogic/msm586seg/devicetree.cb | 2 +- src/mainboard/digitallogic/msm586seg/irq_tables.c | 2 +- src/mainboard/digitallogic/msm586seg/mainboard.c | 22 +-- src/mainboard/digitallogic/msm586seg/romstage.c | 26 +-- src/mainboard/digitallogic/msm800sev/devicetree.cb | 4 +- src/mainboard/digitallogic/msm800sev/romstage.c | 2 +- src/mainboard/eaglelion/5bcm/devicetree.cb | 2 +- src/mainboard/eaglelion/5bcm/irq_tables.c | 2 +- src/mainboard/eaglelion/5bcm/romstage.c | 4 +- src/mainboard/emulation/qemu-x86/devicetree.cb | 2 +- src/mainboard/emulation/qemu-x86/irq_tables.c | 2 +- src/mainboard/emulation/qemu-x86/mainboard.c | 4 +- src/mainboard/emulation/qemu-x86/romstage.c | 4 +- src/mainboard/gigabyte/Kconfig | 2 +- src/mainboard/gigabyte/ga_2761gxdk/Kconfig | 12 +- src/mainboard/gigabyte/m57sli/Kconfig | 14 +- src/mainboard/gigabyte/m57sli/Makefile.inc | 2 +- src/mainboard/gigabyte/m57sli/acpi_tables.c | 8 +- src/mainboard/gigabyte/m57sli/ap_romstage.c | 2 +- src/mainboard/gigabyte/m57sli/cmos.layout | 12 +- src/mainboard/gigabyte/m57sli/dsdt.asl | 6 +- src/mainboard/gigabyte/m57sli/get_bus_conf.c | 14 +- src/mainboard/gigabyte/m57sli/irq_tables.c | 18 +- src/mainboard/gigabyte/m57sli/mptable.c | 10 +- src/mainboard/gigabyte/m57sli/resourcemap.c | 12 +- src/mainboard/gigabyte/m57sli/romstage.c | 16 +- src/mainboard/hp/Kconfig | 2 +- src/mainboard/hp/dl145_g3/romstage.c | 2 +- src/mainboard/ibm/Kconfig | 2 +- src/mainboard/ibm/e325/devicetree.cb | 8 +- src/mainboard/ibm/e325/irq_tables.c | 2 +- src/mainboard/ibm/e325/resourcemap.c | 52 ++--- src/mainboard/ibm/e325/romstage.c | 4 +- src/mainboard/ibm/e326/devicetree.cb | 8 +- src/mainboard/ibm/e326/irq_tables.c | 2 +- src/mainboard/ibm/e326/resourcemap.c | 52 ++--- src/mainboard/ibm/e326/romstage.c | 4 +- src/mainboard/iei/nova4899r/irq_tables.c | 2 +- src/mainboard/iei/pcisa-lx-800-r10/Kconfig | 2 +- .../intel/d945gclf/acpi/i945_pci_irqs.asl | 2 +- .../intel/d945gclf/acpi/ich7_pci_irqs.asl | 2 +- src/mainboard/intel/d945gclf/acpi/mainboard.asl | 2 +- src/mainboard/intel/d945gclf/acpi/platform.asl | 8 +- src/mainboard/intel/d945gclf/acpi/thermal.asl | 2 +- src/mainboard/intel/d945gclf/acpi_tables.c | 2 +- src/mainboard/intel/d945gclf/chip.h | 2 +- src/mainboard/intel/d945gclf/cmos.layout | 2 +- src/mainboard/intel/d945gclf/devicetree.cb | 6 +- src/mainboard/intel/d945gclf/dsdt.asl | 2 +- src/mainboard/intel/d945gclf/mainboard_smi.c | 2 +- src/mainboard/intel/d945gclf/mptable.c | 2 +- src/mainboard/intel/d945gclf/romstage.c | 12 +- src/mainboard/intel/d945gclf/rtl8168.c | 2 +- src/mainboard/intel/eagleheights/Kconfig | 2 +- src/mainboard/intel/jarrell/debug.c | 64 +++---- src/mainboard/intel/jarrell/devicetree.cb | 8 +- src/mainboard/intel/jarrell/jarrell_fixups.c | 30 +-- src/mainboard/intel/jarrell/mptable.c | 6 +- src/mainboard/intel/jarrell/romstage.c | 12 +- src/mainboard/intel/jarrell/watchdog.c | 14 +- src/mainboard/intel/xe7501devkit/acpi_tables.c | 18 +- src/mainboard/intel/xe7501devkit/cmos.layout | 2 +- src/mainboard/intel/xe7501devkit/ioapic.h | 4 +- src/mainboard/intel/xe7501devkit/irq_tables.c | 10 +- src/mainboard/intel/xe7501devkit/mptable.c | 16 +- src/mainboard/intel/xe7501devkit/romstage.c | 6 +- src/mainboard/iwill/Kconfig | 2 +- src/mainboard/iwill/dk8_htx/acpi/amd8111.asl | 26 +-- src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl | 10 +- src/mainboard/iwill/dk8_htx/acpi/amd8131.asl | 80 ++++---- src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl | 30 +-- src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl | 30 +-- src/mainboard/iwill/dk8_htx/acpi/amd8151.asl | 14 +- src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl | 2 +- src/mainboard/iwill/dk8_htx/acpi_tables.c | 14 +- src/mainboard/iwill/dk8_htx/devicetree.cb | 4 +- src/mainboard/iwill/dk8_htx/dsdt.asl | 10 +- src/mainboard/iwill/dk8_htx/fadt.c | 6 +- src/mainboard/iwill/dk8_htx/get_bus_conf.c | 18 +- src/mainboard/iwill/dk8_htx/irq_tables.c | 24 +-- src/mainboard/iwill/dk8_htx/mptable.c | 8 +- src/mainboard/iwill/dk8_htx/resourcemap.c | 8 +- src/mainboard/iwill/dk8_htx/romstage.c | 14 +- src/mainboard/iwill/dk8_htx/ssdt2.asl | 8 +- src/mainboard/iwill/dk8_htx/ssdt3.asl | 8 +- src/mainboard/iwill/dk8_htx/ssdt4.asl | 8 +- src/mainboard/iwill/dk8_htx/ssdt5.asl | 8 +- src/mainboard/iwill/dk8s2/irq_tables.c | 2 +- src/mainboard/iwill/dk8s2/romstage.c | 12 +- src/mainboard/iwill/dk8x/devicetree.cb | 16 +- src/mainboard/iwill/dk8x/irq_tables.c | 6 +- src/mainboard/iwill/dk8x/romstage.c | 12 +- .../kontron/986lcd-m/acpi/i945_pci_irqs.asl | 2 +- .../kontron/986lcd-m/acpi/ich7_pci_irqs.asl | 2 +- src/mainboard/kontron/986lcd-m/acpi/platform.asl | 8 +- src/mainboard/kontron/986lcd-m/acpi/thermal.asl | 2 +- src/mainboard/kontron/986lcd-m/acpi_tables.c | 2 +- src/mainboard/kontron/986lcd-m/chip.h | 2 +- src/mainboard/kontron/986lcd-m/cmos.layout | 2 +- src/mainboard/kontron/986lcd-m/devicetree.cb | 4 +- src/mainboard/kontron/986lcd-m/dsdt.asl | 2 +- src/mainboard/kontron/986lcd-m/mainboard.c | 10 +- src/mainboard/kontron/986lcd-m/mainboard_smi.c | 2 +- src/mainboard/kontron/986lcd-m/mptable.c | 8 +- src/mainboard/kontron/986lcd-m/romstage.c | 20 +- src/mainboard/kontron/986lcd-m/rtl8168.c | 2 +- src/mainboard/kontron/kt690/acpi/routing.asl | 46 ++--- src/mainboard/lippert/Kconfig | 2 +- src/mainboard/lippert/frontrunner/devicetree.cb | 2 +- src/mainboard/lippert/frontrunner/irq_tables.c | 2 +- src/mainboard/lippert/frontrunner/romstage.c | 2 +- src/mainboard/mitac/Kconfig | 2 +- src/mainboard/msi/Kconfig | 2 +- src/mainboard/msi/ms6147/irq_tables.c | 2 +- src/mainboard/msi/ms7135/get_bus_conf.c | 4 +- src/mainboard/msi/ms7135/irq_tables.c | 12 +- src/mainboard/msi/ms7260/Kconfig | 12 +- src/mainboard/msi/ms7260/cmos.layout | 12 +- src/mainboard/msi/ms7260/resourcemap.c | 12 +- src/mainboard/msi/ms7260/romstage.c | 2 +- src/mainboard/msi/ms9282/Kconfig | 12 +- src/mainboard/msi/ms9282/Makefile.inc | 2 +- src/mainboard/msi/ms9652_fam10/acpi_tables.c | 8 +- src/mainboard/msi/ms9652_fam10/dsdt.asl | 6 +- src/mainboard/msi/ms9652_fam10/irq_tables.c | 18 +- src/mainboard/msi/ms9652_fam10/mb_sysconf.h | 2 +- src/mainboard/newisys/Kconfig | 2 +- src/mainboard/newisys/khepri/devicetree.cb | 8 +- src/mainboard/newisys/khepri/resourcemap.c | 6 +- src/mainboard/newisys/khepri/romstage.c | 10 +- src/mainboard/nvidia/Kconfig | 2 +- src/mainboard/nvidia/l1_2pvv/Kconfig | 12 +- src/mainboard/olpc/Kconfig | 2 +- src/mainboard/olpc/btest/devicetree.cb | 4 +- src/mainboard/olpc/btest/irq_tables.c | 2 +- src/mainboard/olpc/btest/mainboard.c | 42 ++-- src/mainboard/olpc/btest/romstage.c | 16 +- src/mainboard/olpc/rev_a/devicetree.cb | 4 +- src/mainboard/olpc/rev_a/irq_tables.c | 2 +- src/mainboard/olpc/rev_a/mainboard.c | 2 +- src/mainboard/olpc/rev_a/romstage.c | 16 +- src/mainboard/pcengines/Kconfig | 2 +- src/mainboard/pcengines/alix1c/Kconfig | 2 +- src/mainboard/pcengines/alix1c/devicetree.cb | 4 +- src/mainboard/rca/Kconfig | 2 +- src/mainboard/rca/rm4100/chip.h | 2 +- src/mainboard/rca/rm4100/gpio.c | 6 +- src/mainboard/rca/rm4100/mainboard.c | 2 +- src/mainboard/rca/rm4100/romstage.c | 4 +- src/mainboard/roda/rk886ex/acpi/battery.asl | 8 +- src/mainboard/roda/rk886ex/acpi/ec.asl | 4 +- src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl | 2 +- src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl | 2 +- src/mainboard/roda/rk886ex/acpi/mainboard.asl | 2 +- src/mainboard/roda/rk886ex/acpi/platform.asl | 8 +- src/mainboard/roda/rk886ex/acpi/superio.asl | 4 +- src/mainboard/roda/rk886ex/acpi/thermal.asl | 2 +- src/mainboard/roda/rk886ex/acpi_tables.c | 6 +- src/mainboard/roda/rk886ex/chip.h | 2 +- src/mainboard/roda/rk886ex/cmos.layout | 2 +- src/mainboard/roda/rk886ex/devicetree.cb | 6 +- src/mainboard/roda/rk886ex/dsdt.asl | 2 +- src/mainboard/roda/rk886ex/ec.c | 2 +- src/mainboard/roda/rk886ex/m3885.c | 14 +- src/mainboard/roda/rk886ex/mainboard.c | 2 +- src/mainboard/roda/rk886ex/mainboard_smi.c | 2 +- src/mainboard/roda/rk886ex/mptable.c | 2 +- src/mainboard/roda/rk886ex/romstage.c | 14 +- src/mainboard/roda/rk886ex/rtl8168.c | 2 +- src/mainboard/soyo/Kconfig | 2 +- src/mainboard/sunw/Kconfig | 2 +- src/mainboard/sunw/ultra40/devicetree.cb | 52 ++--- src/mainboard/sunw/ultra40/get_bus_conf.c | 14 +- src/mainboard/sunw/ultra40/irq_tables.c | 28 +-- src/mainboard/sunw/ultra40/mptable.c | 4 +- src/mainboard/sunw/ultra40/resourcemap.c | 8 +- src/mainboard/sunw/ultra40/romstage.c | 22 +-- src/mainboard/supermicro/Kconfig | 2 +- src/mainboard/supermicro/h8dme/ap_romstage.c | 2 +- src/mainboard/supermicro/h8dme/cmos.layout | 12 +- src/mainboard/supermicro/h8dme/devicetree.cb | 32 ++-- src/mainboard/supermicro/h8dme/get_bus_conf.c | 12 +- src/mainboard/supermicro/h8dme/irq_tables.c | 18 +- src/mainboard/supermicro/h8dme/mptable.c | 6 +- src/mainboard/supermicro/h8dme/resourcemap.c | 10 +- src/mainboard/supermicro/h8dmr/ap_romstage.c | 2 +- src/mainboard/supermicro/h8dmr/cmos.layout | 12 +- src/mainboard/supermicro/h8dmr/devicetree.cb | 52 ++--- src/mainboard/supermicro/h8dmr/get_bus_conf.c | 12 +- src/mainboard/supermicro/h8dmr/irq_tables.c | 18 +- src/mainboard/supermicro/h8dmr/mptable.c | 6 +- src/mainboard/supermicro/h8dmr/resourcemap.c | 10 +- src/mainboard/supermicro/h8dmr/romstage.c | 12 +- src/mainboard/supermicro/h8dmr_fam10/cmos.layout | 12 +- src/mainboard/supermicro/h8dmr_fam10/devicetree.cb | 50 ++--- src/mainboard/supermicro/h8dmr_fam10/irq_tables.c | 18 +- src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h | 2 +- src/mainboard/supermicro/h8dmr_fam10/resourcemap.c | 10 +- src/mainboard/supermicro/h8qme_fam10/cmos.layout | 12 +- src/mainboard/supermicro/h8qme_fam10/devicetree.cb | 26 +-- src/mainboard/supermicro/h8qme_fam10/irq_tables.c | 18 +- src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h | 2 +- src/mainboard/supermicro/h8qme_fam10/mptable.c | 26 +-- src/mainboard/supermicro/h8qme_fam10/resourcemap.c | 10 +- src/mainboard/supermicro/h8qme_fam10/romstage.c | 12 +- src/mainboard/supermicro/x6dai_g/debug.c | 64 +++---- src/mainboard/supermicro/x6dai_g/devicetree.cb | 14 +- src/mainboard/supermicro/x6dai_g/mptable.c | 4 +- src/mainboard/supermicro/x6dai_g/romstage.c | 10 +- src/mainboard/supermicro/x6dai_g/watchdog.c | 6 +- src/mainboard/supermicro/x6dhe_g/debug.c | 64 +++---- src/mainboard/supermicro/x6dhe_g/devicetree.cb | 22 +-- src/mainboard/supermicro/x6dhe_g/mptable.c | 6 +- src/mainboard/supermicro/x6dhe_g/romstage.c | 12 +- src/mainboard/supermicro/x6dhe_g/watchdog.c | 8 +- src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c | 4 +- src/mainboard/supermicro/x6dhe_g2/debug.c | 64 +++---- src/mainboard/supermicro/x6dhe_g2/devicetree.cb | 24 +-- src/mainboard/supermicro/x6dhe_g2/mptable.c | 6 +- src/mainboard/supermicro/x6dhe_g2/romstage.c | 12 +- src/mainboard/supermicro/x6dhe_g2/watchdog.c | 8 +- .../supermicro/x6dhe_g2/x6dhe_g2_fixups.c | 4 +- src/mainboard/supermicro/x6dhr_ig/debug.c | 64 +++---- src/mainboard/supermicro/x6dhr_ig/devicetree.cb | 26 +-- src/mainboard/supermicro/x6dhr_ig/mptable.c | 8 +- src/mainboard/supermicro/x6dhr_ig/romstage.c | 12 +- src/mainboard/supermicro/x6dhr_ig/watchdog.c | 8 +- src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c | 4 +- src/mainboard/supermicro/x6dhr_ig2/debug.c | 64 +++---- src/mainboard/supermicro/x6dhr_ig2/devicetree.cb | 24 +-- src/mainboard/supermicro/x6dhr_ig2/mptable.c | 8 +- src/mainboard/supermicro/x6dhr_ig2/romstage.c | 12 +- src/mainboard/supermicro/x6dhr_ig2/watchdog.c | 8 +- src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c | 4 +- src/mainboard/technexion/Kconfig | 2 +- src/mainboard/technexion/tim5690/mainboard.c | 2 +- src/mainboard/technexion/tim5690/speaker.c | 2 +- src/mainboard/technexion/tim8690/mainboard.c | 2 +- src/mainboard/technologic/Kconfig | 2 +- src/mainboard/technologic/ts5300/chip.h | 2 +- src/mainboard/technologic/ts5300/devicetree.cb | 4 +- src/mainboard/technologic/ts5300/irq_tables.c | 2 +- src/mainboard/technologic/ts5300/mainboard.c | 14 +- src/mainboard/technologic/ts5300/romstage.c | 46 ++--- src/mainboard/thomson/Kconfig | 2 +- src/mainboard/thomson/ip1000/gpio.c | 6 +- src/mainboard/thomson/ip1000/mainboard.c | 10 +- src/mainboard/thomson/ip1000/romstage.c | 2 +- src/mainboard/tyan/Kconfig | 2 +- src/mainboard/tyan/s2735/Kconfig | 4 +- src/mainboard/tyan/s2735/cmos.layout | 4 +- src/mainboard/tyan/s2735/devicetree.cb | 6 +- src/mainboard/tyan/s2735/irq_tables.c | 2 +- src/mainboard/tyan/s2735/mptable.c | 8 +- src/mainboard/tyan/s2735/romstage.c | 4 +- src/mainboard/tyan/s2850/devicetree.cb | 20 +- src/mainboard/tyan/s2850/irq_tables.c | 2 +- src/mainboard/tyan/s2850/mptable.c | 14 +- src/mainboard/tyan/s2850/romstage.c | 6 +- src/mainboard/tyan/s2875/devicetree.cb | 12 +- src/mainboard/tyan/s2875/irq_tables.c | 2 +- src/mainboard/tyan/s2875/mptable.c | 16 +- src/mainboard/tyan/s2875/romstage.c | 4 +- src/mainboard/tyan/s2880/devicetree.cb | 12 +- src/mainboard/tyan/s2880/irq_tables.c | 4 +- src/mainboard/tyan/s2880/mptable.c | 22 +-- src/mainboard/tyan/s2880/romstage.c | 6 +- src/mainboard/tyan/s2881/devicetree.cb | 16 +- src/mainboard/tyan/s2881/get_bus_conf.c | 10 +- src/mainboard/tyan/s2881/irq_tables.c | 20 +- src/mainboard/tyan/s2881/mainboard.c | 2 +- src/mainboard/tyan/s2881/mptable.c | 10 +- src/mainboard/tyan/s2881/resourcemap.c | 6 +- src/mainboard/tyan/s2881/romstage.c | 4 +- src/mainboard/tyan/s2882/devicetree.cb | 14 +- src/mainboard/tyan/s2882/irq_tables.c | 26 +-- src/mainboard/tyan/s2882/mptable.c | 18 +- src/mainboard/tyan/s2882/romstage.c | 6 +- src/mainboard/tyan/s2885/devicetree.cb | 28 +-- src/mainboard/tyan/s2885/get_bus_conf.c | 10 +- src/mainboard/tyan/s2885/irq_tables.c | 22 +-- src/mainboard/tyan/s2885/mptable.c | 8 +- src/mainboard/tyan/s2885/resourcemap.c | 6 +- src/mainboard/tyan/s2885/romstage.c | 8 +- src/mainboard/tyan/s2891/resourcemap.c | 12 +- src/mainboard/tyan/s2892/dsdt.asl | 10 +- src/mainboard/tyan/s2895/dsdt.asl | 10 +- src/mainboard/tyan/s2912/Kconfig | 12 +- src/mainboard/tyan/s2912/ap_romstage.c | 2 +- src/mainboard/tyan/s2912/get_bus_conf.c | 4 +- src/mainboard/tyan/s2912/mb_sysconf.h | 2 +- src/mainboard/tyan/s2912_fam10/irq_tables.c | 18 +- src/mainboard/tyan/s2912_fam10/mb_sysconf.h | 2 +- src/mainboard/tyan/s4880/devicetree.cb | 8 +- src/mainboard/tyan/s4880/irq_tables.c | 2 +- src/mainboard/tyan/s4880/mptable.c | 26 +-- src/mainboard/tyan/s4880/resourcemap.c | 6 +- src/mainboard/tyan/s4880/romstage.c | 8 +- src/mainboard/tyan/s4882/devicetree.cb | 20 +- src/mainboard/tyan/s4882/irq_tables.c | 2 +- src/mainboard/tyan/s4882/mptable.c | 28 +-- src/mainboard/tyan/s4882/resourcemap.c | 6 +- src/mainboard/tyan/s4882/romstage.c | 10 +- src/mainboard/via/epia-cn/romstage.c | 2 +- src/mainboard/via/epia-m/acpi_tables.c | 10 +- src/mainboard/via/epia-m/devicetree.cb | 6 +- src/mainboard/via/epia-m/dsdt.asl | 56 +++--- src/mainboard/via/epia-m/dsdt.c | 6 +- src/mainboard/via/epia-m/irq_tables.c | 2 +- src/mainboard/via/epia-m/romstage.c | 16 +- src/mainboard/via/epia-m700/romstage.c | 4 +- src/mainboard/via/epia-n/acpi_tables.c | 10 +- src/mainboard/via/epia-n/dsdt.asl | 2 +- src/mainboard/via/epia-n/romstage.c | 16 +- src/mainboard/via/epia/irq_tables.c | 2 +- src/mainboard/via/epia/romstage.c | 16 +- src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl | 108 +++++------ src/mainboard/via/vt8454c/acpi/irq.asl | 212 ++++++++++----------- src/mainboard/via/vt8454c/acpi_tables.c | 2 +- src/mainboard/via/vt8454c/dsdt.asl | 54 +++--- src/mainboard/via/vt8454c/romstage.c | 4 +- src/mainboard/winent/pl6064/devicetree.cb | 2 +- 383 files changed, 2209 insertions(+), 2209 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/a-trend/Kconfig b/src/mainboard/a-trend/Kconfig index f5a379f84d..7cb53924dd 100644 --- a/src/mainboard/a-trend/Kconfig +++ b/src/mainboard/a-trend/Kconfig @@ -21,7 +21,7 @@ choice prompt "Mainboard model" depends on VENDOR_A_TREND - + source "src/mainboard/a-trend/atc-6220/Kconfig" source "src/mainboard/a-trend/atc-6240/Kconfig" diff --git a/src/mainboard/abit/Kconfig b/src/mainboard/abit/Kconfig index 982cc9eee7..1f704b84c3 100644 --- a/src/mainboard/abit/Kconfig +++ b/src/mainboard/abit/Kconfig @@ -21,7 +21,7 @@ choice prompt "Mainboard model" depends on VENDOR_ABIT - + source "src/mainboard/abit/be6-ii_v2_0/Kconfig" endchoice diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb index 0c0c8f0c31..bc84dc0373 100644 --- a/src/mainboard/amd/rumba/devicetree.cb +++ b/src/mainboard/amd/rumba/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/amd/gx2 device apic 0 on end end end - device pci_domain 0 on + device pci_domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/rumba/irq_tables.c b/src/mainboard/amd/rumba/irq_tables.c index 598350b4b8..f751b481ca 100644 --- a/src/mainboard/amd/rumba/irq_tables.c +++ b/src/mainboard/amd/rumba/irq_tables.c @@ -1,4 +1,4 @@ -/* This file was generated by getpir.c, do not modify! +/* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up * diff --git a/src/mainboard/amd/rumba/mainboard.c b/src/mainboard/amd/rumba/mainboard.c index adb1786678..0e7bbb66e7 100644 --- a/src/mainboard/amd/rumba/mainboard.c +++ b/src/mainboard/amd/rumba/mainboard.c @@ -19,7 +19,7 @@ static void init(struct device *dev) { printk(BIOS_DEBUG, "AMD RUMBA ENTER %s\n", __func__); if (nicirq) { - printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n", + printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n", __func__, bus, devfn, nicirq); nic = dev_find_slot(bus, devfn); if (! nic){ diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 813b009471..958cf3196c 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -35,7 +35,7 @@ static inline unsigned int fls(unsigned int x) return r; } -static void sdram_set_spd_registers(const struct mem_controller *ctrl) +static void sdram_set_spd_registers(const struct mem_controller *ctrl) { /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) * * component Banks (byte 17) * module banks, side (byte 5) * @@ -86,7 +86,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) msr = rdmsr(0x20000019); msr.hi = 0x18000108; msr.lo = 0x696332a3; - wrmsr(0x20000019, msr); + wrmsr(0x20000019, msr); } @@ -122,7 +122,7 @@ static void main(unsigned long bist) }; SystemPreInit(); - + w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); @@ -134,7 +134,7 @@ static void main(unsigned long bist) cpuRegInit(); print_err("done cpuRegInit\n"); - + sdram_initialize(1, memctrl); msr_init(); diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl index b2474e2a20..77958b2063 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl @@ -4,17 +4,17 @@ //AMD8111 Name (APIC, Package (0x04) { - Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present - Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, - Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, + Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present + Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, + Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13} }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00} }) @@ -34,16 +34,16 @@ Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0)) Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0)) Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0)) - + Store (0x00, ^DNCG) - + } - If (LNot (PICF)) { - Return (PICM) + If (LNot (PICF)) { + Return (PICM) } Else { - Return (APIC) + Return (APIC) } } @@ -57,7 +57,7 @@ OperationRegion (PIRQ, PCI_Config, 0x56, 0x02) Field (PIRQ, ByteAcc, Lock, Preserve) { - PIBA, 8, + PIBA, 8, PIDC, 8 } /* @@ -144,7 +144,7 @@ Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 } }) - + Name (PICM, Package (0x0C) { Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl index 9d93e34e92..9e952c80bd 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl @@ -5,7 +5,7 @@ Device (ISA) { - /* lpc 0x00040000 */ + /* lpc 0x00040000 */ Method (_ADR, 0, NotSerialized) { Return (DADD(\_SB.PCI0.SBDN, 0x00010000)) @@ -15,11 +15,11 @@ Field (PIRY, ByteAcc, NoLock, Preserve) { Z000, 2, // Parallel Port Range - , 1, + , 1, ECP, 1, // ECP Enable FDC1, 1, // Floppy Drive Controller 1 FDC2, 1, // Floppy Drive Controller 2 - Offset (0x01), + Offset (0x01), Z001, 3, // Serial Port A Range SAEN, 1, // Serial Post A Enabled Z002, 3, // Serial Port B Range @@ -106,7 +106,7 @@ IO (Decode16, 0x0090, 0x0090, 0x01, 0x10) IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E) IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10) - IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error + IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error }) Method (_CRS, 0, NotSerialized) @@ -134,7 +134,7 @@ Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS }) - // Read the Video Memory length + // Read the Video Memory length CreateDWordField (BUF0, 0x14, CLEN) CreateDWordField (BUF0, 0x10, CBAS) diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl index e209665e48..172f0bf9d1 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl @@ -1,7 +1,7 @@ /* * Copyright 2005 AMD */ - + Device (PG0A) { /* 8132 pcix bridge*/ @@ -19,60 +19,60 @@ Name (APIC, Package (0x14) { // Slot A - PIRQ BCDA - Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 - Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, - Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, + Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 + Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, + Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 }, - + //Cypress Slot A - PIRQ BCDA Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //? - Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, - Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, - Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, + Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, + Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, + Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, //Cypress Slot B - PIRQ CDAB Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //? - Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, - Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, - Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, + Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, + Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, + Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, //Cypress Slot C - PIRQ DABC Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //? - Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, - Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, - Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, + Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, + Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, + Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, //Cypress Slot D - PIRQ ABCD Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //? - Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, - Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, + Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, + Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B } }) Name (PICM, Package (0x14) { - Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2 - Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2 + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) Method (_PRT, 0, NotSerialized) @@ -100,15 +100,15 @@ { // Slot A - PIRQ ABCD Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1 - Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, - Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, + Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, + Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 } }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 - Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) Method (_PRT, 0, NotSerialized) diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl index 163c0f6061..8b8bc9fab9 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl @@ -1,7 +1,7 @@ /* * Copyright 2005 AMD */ - + Device (PG0A) { /* 8132 pcix bridge*/ @@ -19,18 +19,18 @@ Name (APIC, Package (0x04) { // Slot A - PIRQ BCDA - Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B }, - + }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, }) Name (DNCG, Ones) @@ -40,7 +40,7 @@ If (LEqual (^DNCG, Ones)) { Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8 Store (0x00, Local1) - While (LLess (Local1, 0x04)) + While (LLess (Local1, 0x04)) { // Update the GSI according to HCIN Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) @@ -76,15 +76,15 @@ { // Slot A - PIRQ ABCD Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1 - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 } }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl index 75ef72343a..e5cfe3c951 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl @@ -1,7 +1,7 @@ /* * Copyright 2005 AMD */ - + Device (PG0A) { /* 8132 pcix bridge*/ @@ -19,18 +19,18 @@ Name (APIC, Package (0x04) { // Slot A - PIRQ BCDA - Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B }, - + }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, }) Name (DNCG, Ones) @@ -40,7 +40,7 @@ If (LEqual (^DNCG, Ones)) { Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14 Store (0x00, Local1) - While (LLess (Local1, 0x04)) + While (LLess (Local1, 0x04)) { // Update the GSI according to HCIN Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) @@ -76,15 +76,15 @@ { // Slot A - PIRQ ABCD Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1 - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 } }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl index 001d45b0fe..ce85502296 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl @@ -1,4 +1,4 @@ -// AMD8151 +// AMD8151 Device (AGPB) { Method (_ADR, 0, NotSerialized) @@ -8,16 +8,16 @@ Name (APIC, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 } }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) Method (_PRT, 0, NotSerialized) diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c index c2b8e8c7b3..f132ec727c 100644 --- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c @@ -4,7 +4,7 @@ #define RAMINIT_SYSINFO 1 #define CACHE_AS_RAM_ADDRESS_DEBUG 0 -#define SET_NB_CFG_54 1 +#define SET_NB_CFG_54 1 //used by raminit #define QRANK_DIMM_SUPPORT 1 diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb index b9742b4a46..c1748697f4 100644 --- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/amd/amdk8/root_complex end device pci_domain 0 on chip northbridge/amd/amdk8 - device pci 18.0 on # northbridge + device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 chip southbridge/amd/amd8132 # the on/off keyword is mandatory @@ -56,7 +56,7 @@ chip northbridge/amd/amdk8/root_complex io 0x60 = 0x220 io 0x62 = 0x300 irq 0x70 = 9 - end + end device pnp 2e.8 off end # GPIO2 device pnp 2e.9 off end # GPIO3 device pnp 2e.a off end # ACPI @@ -120,7 +120,7 @@ chip northbridge/amd/amdk8/root_complex end # device pci 18.0 device pci 18.0 on end - device pci 18.0 on end + device pci 18.0 on end device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end diff --git a/src/mainboard/amd/serengeti_cheetah/dsdt.asl b/src/mainboard/amd/serengeti_cheetah/dsdt.asl index ee87023ff8..a549d70297 100644 --- a/src/mainboard/amd/serengeti_cheetah/dsdt.asl +++ b/src/mainboard/amd/serengeti_cheetah/dsdt.asl @@ -100,11 +100,11 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1) Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2) Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3) - Return (Local3) + Return (Local3) } #include "acpi/pci0_hc.asl" - + } Device (PCI1) { @@ -138,7 +138,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) Notify (\_SB.PCI0.PG0B, 0x02) } - Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A + Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A { Notify (\_SB.PCI0.PG0A, 0x02) } @@ -183,14 +183,14 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100) Field (GRAM, ByteAcc, Lock, Preserve) { - Offset (0x10), + Offset (0x10), FLG0, 8 } OperationRegion (GSTS, SystemIO, 0xC028, 0x02) Field (GSTS, ByteAcc, NoLock, Preserve) { - , 4, + , 4, IRQR, 1 } diff --git a/src/mainboard/amd/serengeti_cheetah/fadt.c b/src/mainboard/amd/serengeti_cheetah/fadt.c index d4c6622847..6b6107070b 100644 --- a/src/mainboard/amd/serengeti_cheetah/fadt.c +++ b/src/mainboard/amd/serengeti_cheetah/fadt.c @@ -30,7 +30,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){ // 3=Workstation,4=Enterprise Server, 7=Performance Server fadt->preferred_pm_profile=0x03; fadt->sci_int=9; - // disable system management mode by setting to 0: + // disable system management mode by setting to 0: fadt->smi_cmd = 0;//pm_base+0x2f; fadt->acpi_enable = 0xf0; fadt->acpi_disable = 0xf1; @@ -53,7 +53,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){ fadt->gpe0_blk_len = 4; fadt->gpe1_blk_len = 8; fadt->gpe1_base = 16; - + fadt->cst_cnt = 0xe3; fadt->p_lvl2_lat = 101; fadt->p_lvl3_lat = 1001; @@ -66,7 +66,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){ fadt->century = 0; // 0x7f to make rtc alrm work fadt->iapc_boot_arch = 0x3; // See table 5-11 fadt->flags = 0x25; - + fadt->res2 = 0; fadt->reset_reg.space_id = 1; diff --git a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c index 436044e69a..3674ff0076 100644 --- a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c +++ b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c @@ -15,7 +15,7 @@ // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables struct mb_sysconf_t mb_sysconf; -static unsigned pci1234x[] = +static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail 0x0000ff0, @@ -27,7 +27,7 @@ static unsigned pci1234x[] = // 0x0000ff0, // 0x0000ff0 }; -static unsigned hcdnx[] = +static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most 0x20202020, 0x20202020, @@ -88,17 +88,17 @@ void get_bus_conf(void) get_bus_conf_done = 1; sysconf.mb = &mb_sysconf; - + m = sysconf.mb; - sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); + sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); for(i=0;i> 8) & 0xff; m->sbdn3 = sysconf.hcdn[0] & 0xff; @@ -209,8 +209,8 @@ void get_bus_conf(void) /*I/O APICs: APIC ID Version State Address*/ #if CONFIG_LOGICAL_CPUS==1 apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; +#else + apicid_base = CONFIG_MAX_PHYSICAL_CPUS; #endif m->apicid_8111 = apicid_base+0; m->apicid_8132_1 = apicid_base+1; diff --git a/src/mainboard/amd/serengeti_cheetah/irq_tables.c b/src/mainboard/amd/serengeti_cheetah/irq_tables.c index d872b0a0db..637f980055 100644 --- a/src/mainboard/amd/serengeti_cheetah/irq_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/irq_tables.c @@ -1,4 +1,4 @@ -/* This file was generated by getpir.c, do not modify! +/* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up @@ -13,11 +13,11 @@ #include "mb_sysconf.h" -static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, +static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, uint8_t slot, uint8_t rfu) { - pirq_info->bus = bus; + pirq_info->bus = bus; pirq_info->devfn = devfn; pirq_info->irq[0].link = link0; @@ -50,7 +50,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) struct mb_sysconf_t *m; get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c - + m = sysconf.mb; /* Align the table to be 16 byte aligned. */ @@ -62,25 +62,25 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq = (void *)(addr); v = (uint8_t *)(addr); - + pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - + pirq->rtr_bus = m->bus_8111_0; pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0; pirq->exclusive_irqs = 0; - + pirq->rtr_vendor = 0x1022; pirq->rtr_device = 0x746b; pirq->miniport_data = 0; memset(pirq->rfu, 0, sizeof(pirq->rfu)); - + pirq_info = (void *) ( &pirq->checksum + 1); slot_num = 0; - + { device_t dev; dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3)); @@ -126,11 +126,11 @@ unsigned long write_pirq_routing_table(unsigned long addr) j++; } - - pirq->size = 32 + 16 * slot_num; + + pirq->size = 32 + 16 * slot_num; for (i = 0; i < pirq->size; i++) - sum += v[i]; + sum += v[i]; sum = pirq->checksum - sum; diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index 2b2f65c39b..fe2f9440e2 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -101,8 +101,8 @@ static void *smp_write_config_table(void *v) } } - -/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ + +/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x1, m->apicid_8111, 0x1); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x2); diff --git a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt index 41988c8ede..685cd7a2ce 100644 --- a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt +++ b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt @@ -6,7 +6,7 @@ At this time, For acpi support We got The developers need to change for different MB -Change dsdt.asl, according to MB layout +Change dsdt.asl, according to MB layout pci1, pci2, pci3, pci4, ...., pci8 if there is HT-IO board, may use pci2.asl.... to create ssdt2.c, and ssdt3,c and ssdt4.c, ....ssdt8.c @@ -17,7 +17,7 @@ Change acpi_tables.c Regarding pci bridge apic and pic need to modify entries amd8111.asl and amd8131.asl and amd8151.asl.... acording to your MB laybout, it is like that in mptable.c -About other chipsets, need to develop their special asl such as +About other chipsets, need to develop their special asl such as ck804.asl --- NB ck804 bcm5785.asl or bcm5780.asl ---- Serverworks HT1000/HT2000 @@ -27,4 +27,4 @@ use c to delele hex file yhlu 09/18/2005 - + diff --git a/src/mainboard/amd/serengeti_cheetah/resourcemap.c b/src/mainboard/amd/serengeti_cheetah/resourcemap.c index 9b19503360..be11b689da 100644 --- a/src/mainboard/amd/serengeti_cheetah/resourcemap.c +++ b/src/mainboard/amd/serengeti_cheetah/resourcemap.c @@ -143,7 +143,7 @@ static void setup_mb_resource_map(void) * 1 = base/limit registers i are read-only * [ 7: 4] Reserved * [31: 8] Memory-Mapped I/O Base Address i (39-16) - * This field defines the upper address bits of a 40bit address + * This field defines the upper address bits of a 40bit address * that defines the start of memory-mapped I/O region i */ PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000, @@ -199,7 +199,7 @@ static void setup_mb_resource_map(void) * [ 3: 2] Reserved * [ 4: 4] VGA Enable * 0 = VGA matches Disabled - * 1 = matches all address < 64K and where A[9:0] is in the + * 1 = matches all address < 64K and where A[9:0] is in the * range 3B0-3BB or 3C0-3DF independen of the base & limit registers * [ 5: 5] ISA Enable * 0 = ISA matches Disabled @@ -207,7 +207,7 @@ static void setup_mb_resource_map(void) * from matching agains this base/limit pair * [11: 6] Reserved * [24:12] PCI I/O Base i - * This field defines the start of PCI I/O region n + * This field defines the start of PCI I/O region n * [31:25] Reserved */ PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003, diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 00d4b3b21a..6fcaa90875 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -1,7 +1,7 @@ #define RAMINIT_SYSINFO 1 #define CACHE_AS_RAM_ADDRESS_DEBUG 0 -#define SET_NB_CFG_54 1 +#define SET_NB_CFG_54 1 //used by raminit #define QRANK_DIMM_SUPPORT 1 @@ -107,7 +107,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" /* tyan does not want the default */ -#include "resourcemap.c" +#include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" @@ -186,7 +186,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); // dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - + /* Halt if there was a built in self test failure */ report_bist_failure(bist); @@ -201,21 +201,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 - set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram + set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram #endif setup_coherent_ht_domain(); // routing table and start other core0 wait_all_core0_started(); #if CONFIG_LOGICAL_CPUS==1 // It is said that we should start core1 after all core0 launched - /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, + /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, * So here need to make sure last core0 is started, esp for two way system, - * (there may be apic id conflicts in that case) + * (there may be apic id conflicts in that case) */ start_other_cores(); wait_all_other_cores_started(bsp_apicid); #endif - + /* it will set up chains and store link pair for optimization later */ ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn @@ -249,7 +249,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } diff --git a/src/mainboard/amd/serengeti_cheetah/ssdt2.asl b/src/mainboard/amd/serengeti_cheetah/ssdt2.asl index 582ef97621..791454c190 100644 --- a/src/mainboard/amd/serengeti_cheetah/ssdt2.asl +++ b/src/mainboard/amd/serengeti_cheetah/ssdt2.asl @@ -28,16 +28,16 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) // BUS ? Second HT Chain Name (HCIN, 0xcc) // HC2 0x01 - + Name (_UID, 0xdd) // HC 0x03 - Name (_HID, "PNP0A03") + Name (_HID, "PNP0A03") Method (_ADR, 0, NotSerialized) //Fake bus should be 0 { Return (DADD(GHCN(HCIN), 0x00000000)) } - + Method (_BBN, 0, NotSerialized) { Return (GBUS (GHCN(HCIN), GHCL(HCIN))) @@ -45,7 +45,7 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) Method (_STA, 0, NotSerialized) { - Return (\_SB.GHCE(HCIN)) + Return (\_SB.GHCE(HCIN)) } Method (_CRS, 0, NotSerialized) diff --git a/src/mainboard/amd/serengeti_cheetah/ssdt3.asl b/src/mainboard/amd/serengeti_cheetah/ssdt3.asl index 583e945740..28fe5f45a3 100644 --- a/src/mainboard/amd/serengeti_cheetah/ssdt3.asl +++ b/src/mainboard/amd/serengeti_cheetah/ssdt3.asl @@ -28,16 +28,16 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) // BUS ? Second HT Chain Name (HCIN, 0xcc) // HC2 0x01 - + Name (_UID, 0xdd) // HC 0x03 - Name (_HID, "PNP0A03") + Name (_HID, "PNP0A03") Method (_ADR, 0, NotSerialized) //Fake bus should be 0 { Return (DADD(GHCN(HCIN), 0x00000000)) } - + Method (_BBN, 0, NotSerialized) { Return (GBUS (GHCN(HCIN), GHCL(HCIN))) @@ -45,7 +45,7 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) Method (_STA, 0, NotSerialized) { - Return (\_SB.GHCE(HCIN)) + Return (\_SB.GHCE(HCIN)) } Method (_CRS, 0, NotSerialized) diff --git a/src/mainboard/amd/serengeti_cheetah/ssdt4.asl b/src/mainboard/amd/serengeti_cheetah/ssdt4.asl index fd7224d17a..93abb7f520 100644 --- a/src/mainboard/amd/serengeti_cheetah/ssdt4.asl +++ b/src/mainboard/amd/serengeti_cheetah/ssdt4.asl @@ -28,16 +28,16 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) // BUS ? Second HT Chain Name (HCIN, 0xcc) // HC2 0x01 - + Name (_UID, 0xdd) // HC 0x03 - Name (_HID, "PNP0A03") + Name (_HID, "PNP0A03") Method (_ADR, 0, NotSerialized) //Fake bus should be 0 { Return (DADD(GHCN(HCIN), 0x00000000)) } - + Method (_BBN, 0, NotSerialized) { Return (GBUS (GHCN(HCIN), GHCL(HCIN))) @@ -45,7 +45,7 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) Method (_STA, 0, NotSerialized) { - Return (\_SB.GHCE(HCIN)) + Return (\_SB.GHCE(HCIN)) } Method (_CRS, 0, NotSerialized) diff --git a/src/mainboard/arima/Kconfig b/src/mainboard/arima/Kconfig index d1979b00a2..8895433a55 100644 --- a/src/mainboard/arima/Kconfig +++ b/src/mainboard/arima/Kconfig @@ -1,7 +1,7 @@ choice prompt "Mainboard model" depends on VENDOR_ARIMA - + source "src/mainboard/arima/hdama/Kconfig" endchoice diff --git a/src/mainboard/arima/hdama/debug.c b/src/mainboard/arima/hdama/debug.c index 0db327c5c6..a6f0d558a8 100644 --- a/src/mainboard/arima/hdama/debug.c +++ b/src/mainboard/arima/hdama/debug.c @@ -12,8 +12,8 @@ static void print_debug_pci_dev(unsigned dev) static void print_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; id = pci_read_config32(dev, PCI_VENDOR_ID); @@ -32,7 +32,7 @@ static void dump_pci_device(unsigned dev) int i; print_debug_pci_dev(dev); print_debug("\n"); - + for(i = 0; i <= 255; i++) { unsigned char val; if ((i & 0x0f) == 0) { @@ -51,8 +51,8 @@ static void dump_pci_device(unsigned dev) static void dump_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; id = pci_read_config32(dev, PCI_VENDOR_ID); @@ -77,10 +77,10 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr device = ctrl[n].channel0[i]; if (device) { int j; - print_debug("dimm: "); + print_debug("dimm: "); print_debug_hex8(n); print_debug_char('.'); - print_debug_hex8(i); + print_debug_hex8(i); print_debug(".0: "); print_debug_hex8(device); for(j = 0; j < 256; j++) { @@ -109,10 +109,10 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr device = ctrl[n].channel1[i]; if (device) { int j; - print_debug("dimm: "); + print_debug("dimm: "); print_debug_hex8(n); print_debug_char('.'); - print_debug_hex8(i); + print_debug_hex8(i); print_debug(".1: "); print_debug_hex8(device); for(j = 0; j < 256; j++) { diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb index a812814782..0ab47a4f0b 100644 --- a/src/mainboard/arima/hdama/devicetree.cb +++ b/src/mainboard/arima/hdama/devicetree.cb @@ -6,14 +6,14 @@ chip northbridge/amd/amdk8/root_complex end device pci_domain 0 on chip northbridge/amd/amdk8 - device pci 18.0 on # northbridge - # devices on link 0, link 0 == LDT 0 + device pci 18.0 on # northbridge + # devices on link 0, link 0 == LDT 0 chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on # PCIX bridge ## On board NIC A #chip drivers/generic/generic - # device pci 3.0 on + # device pci 3.0 on # irq 0 = 0x13 # end #end @@ -31,7 +31,7 @@ chip northbridge/amd/amdk8/root_complex # irq 2 = 0x13 # irq 3 = 0x10 # end - #end + #end ## PCI Slot 4 #chip drivers/generic/generic # device pci 2.0 on @@ -40,7 +40,7 @@ chip northbridge/amd/amdk8/root_complex # irq 2 = 0x10 # irq 3 = 0x11 # end - #end + #end end device pci 0.1 on end # IOAPIC device pci 1.0 on # PCIX bridge @@ -61,7 +61,7 @@ chip northbridge/amd/amdk8/root_complex # irq 2 = 0x10 # irq 3 = 0x11 # end - #end + #end end device pci 1.1 on end # IOAPIC end @@ -82,7 +82,7 @@ chip northbridge/amd/amdk8/root_complex # irq 2 = 0x13 # irq 3 = 0x10 # end - #end + #end ## PCI Slot 6 (correct?) #chip drivers/generic/generic # device pci 4.0 on @@ -91,13 +91,13 @@ chip northbridge/amd/amdk8/root_complex # irq 2 = 0x12 # irq 3 = 0x13 # end - #end + #end end # LPC bridge device pci 1.0 on chip superio/nsc/pc87360 - device pnp 2e.0 off # Floppy + device pnp 2e.0 off # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 @@ -124,7 +124,7 @@ chip northbridge/amd/amdk8/root_complex device pnp 2e.7 off end # GPIO device pnp 2e.8 off end # ACB device pnp 2e.9 off end # FSCM - device pnp 2e.a off end # WDT + device pnp 2e.a off end # WDT end end device pci 1.1 on end # IDE @@ -132,8 +132,8 @@ chip northbridge/amd/amdk8/root_complex device pci 1.3 on # System Management chip drivers/generic/generic #phillips pca9545 smbus mux - device i2c 70 on - # analog_devices adm1026 + device i2c 70 on + # analog_devices adm1026 chip drivers/generic/generic device i2c 2c on end end @@ -147,33 +147,33 @@ chip northbridge/amd/amdk8/root_complex end chip drivers/generic/generic #dimm 0-0-1 device i2c 51 on end - end + end chip drivers/generic/generic #dimm 0-1-0 device i2c 52 on end - end + end chip drivers/generic/generic #dimm 0-1-1 device i2c 53 on end - end + end chip drivers/generic/generic #dimm 1-0-0 - device i2c 54 on end + device i2c 54 on end end chip drivers/generic/generic #dimm 1-0-1 device i2c 55 on end - end + end chip drivers/generic/generic #dimm 1-1-0 device i2c 56 on end - end + end chip drivers/generic/generic #dimm 1-1-1 device i2c 57 on end - end + end end device pci 1.5 off end # AC97 Audio device pci 1.6 on end # AC97 Modem register "ide0_enable" = "1" register "ide1_enable" = "1" end - end # device pci 18.0 - + end # device pci 18.0 + device pci 18.0 on end # LDT1 device pci 18.0 on end # LDT2 device pci 18.1 on end @@ -188,6 +188,6 @@ chip northbridge/amd/amdk8/root_complex device pci 19.2 on end device pci 19.3 on end end - end + end end diff --git a/src/mainboard/arima/hdama/irq_tables.c b/src/mainboard/arima/hdama/irq_tables.c index 2ca98066d0..ba516f88e2 100644 --- a/src/mainboard/arima/hdama/irq_tables.c +++ b/src/mainboard/arima/hdama/irq_tables.c @@ -12,7 +12,7 @@ {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0} /* Each IRQ_SLOT entry consists of: - * bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu + * bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ const struct irq_routing_table intel_irq_routing_table = { diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c index 643dfabd5d..11b8063f95 100644 --- a/src/mainboard/arima/hdama/mptable.c +++ b/src/mainboard/arima/hdama/mptable.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include #define HT_INIT_CONTROL 0x6c @@ -26,7 +26,7 @@ static void smp_write_processors_inorder(struct mp_config_table *mc) unsigned cpu_feature_flags; struct cpuid_result result; device_t cpu; - + boot_apic_id = lapicid(); apic_version = lapic_read(LAPIC_LVR) & 0xff; result = cpuid(1); @@ -57,7 +57,7 @@ static void smp_write_processors_inorder(struct mp_config_table *mc) } } } - + static unsigned node_link_to_bus(unsigned node, unsigned link) { device_t dev; @@ -79,12 +79,12 @@ static unsigned node_link_to_bus(unsigned node, unsigned link) dst_node = (config_map >> 4) & 7; dst_link = (config_map >> 8) & 3; bus_base = (config_map >> 16) & 0xff; -#if 0 +#if 0 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n", dst_node, dst_link, bus_base, reg, config_map); #endif - if ((dst_node == node) && (dst_link == link)) + if ((dst_node == node) && (dst_link == link)) { return bus_base; } diff --git a/src/mainboard/artecgroup/Kconfig b/src/mainboard/artecgroup/Kconfig index 5f1a6e906f..e95e56a055 100644 --- a/src/mainboard/artecgroup/Kconfig +++ b/src/mainboard/artecgroup/Kconfig @@ -1,7 +1,7 @@ choice prompt "Mainboard model" depends on VENDOR_ARTEC_GROUP - + source "src/mainboard/artecgroup/dbe61/Kconfig" endchoice diff --git a/src/mainboard/artecgroup/dbe61/spd_table.h b/src/mainboard/artecgroup/dbe61/spd_table.h index 33c9237836..73c777c9c4 100644 --- a/src/mainboard/artecgroup/dbe61/spd_table.h +++ b/src/mainboard/artecgroup/dbe61/spd_table.h @@ -27,7 +27,7 @@ struct spd_entry { /* Save space by using a short list of SPD values used by Geode LX Memory init */ /* 128MB */ -const struct spd_entry spd_table [] = +const struct spd_entry spd_table [] = { {SPD_MEMORY_TYPE, 0x07}, /* (Fundamental) memory type */ {SPD_NUM_ROWS, 0x0D}, /* Number of row address bits */ diff --git a/src/mainboard/asus/a8n_e/irq_tables.c b/src/mainboard/asus/a8n_e/irq_tables.c index 0c0d3467a2..ce15efd1a8 100644 --- a/src/mainboard/asus/a8n_e/irq_tables.c +++ b/src/mainboard/asus/a8n_e/irq_tables.c @@ -67,7 +67,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) uint8_t *v, sum = 0; int i; - /* get_bus_conf() will find out all bus num and APIC that share with + /* get_bus_conf() will find out all bus num and APIC that share with * mptable.c and mptable.c. */ get_bus_conf(); diff --git a/src/mainboard/asus/a8v-e_se/acpi_tables.c b/src/mainboard/asus/a8v-e_se/acpi_tables.c index de957a8f78..e7e6bb40f7 100644 --- a/src/mainboard/asus/a8v-e_se/acpi_tables.c +++ b/src/mainboard/asus/a8v-e_se/acpi_tables.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Written by Stefan Reinauer . - * ACPI FADT, FACS, and DSDT table support added by + * ACPI FADT, FACS, and DSDT table support added by * * Copyright (C) 2004 Stefan Reinauer * Copyright (C) 2005 Nick Barker @@ -71,7 +71,7 @@ unsigned long acpi_fill_madt(unsigned long current) /* IRQ0 -> APIC IRQ2. */ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0x0); + current, 0, 0, 2, 0x0); /* Create all subtables for processors. */ current = acpi_create_madt_lapic_nmis(current, diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index 3ec90f8010..f571bae472 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -5,7 +5,7 @@ * (Written by Yinghai Lu for AMD) * Copyright (C) 2006 MSI * (Written by Bingxun Shi for MSI) - * Copyright (C) 2007 Rudolf Marek + * Copyright (C) 2007 Rudolf Marek * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -180,7 +180,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) }; unsigned bsp_apicid = 0; int needs_reset = 0; - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); sio_init(); diff --git a/src/mainboard/asus/m2v-mx_se/acpi_tables.c b/src/mainboard/asus/m2v-mx_se/acpi_tables.c index 46a6c1f6a4..1862bc993f 100644 --- a/src/mainboard/asus/m2v-mx_se/acpi_tables.c +++ b/src/mainboard/asus/m2v-mx_se/acpi_tables.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Written by Stefan Reinauer . - * ACPI FADT, FACS, and DSDT table support added by + * ACPI FADT, FACS, and DSDT table support added by * * Copyright (C) 2004 Stefan Reinauer * Copyright (C) 2005 Nick Barker @@ -73,7 +73,7 @@ unsigned long acpi_fill_madt(unsigned long current) /* IRQ0 -> APIC IRQ2. */ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0x0); + current, 0, 0, 2, 0x0); /* Create all subtables for processors. */ current = acpi_create_madt_lapic_nmis(current, diff --git a/src/mainboard/asus/m2v-mx_se/dsdt.asl b/src/mainboard/asus/m2v-mx_se/dsdt.asl index fd4d42d378..493f1d6c8f 100644 --- a/src/mainboard/asus/m2v-mx_se/dsdt.asl +++ b/src/mainboard/asus/m2v-mx_se/dsdt.asl @@ -60,7 +60,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) Name (_ADR, 0x00) Name (_UID, 0x00) Name (_BBN, 0x00) - + External (BUSN) External (MMIO) External (PCIO) @@ -95,7 +95,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1) Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2) Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3) - Return (Local3) + Return (Local3) } /* PCI Routing Table */ @@ -185,7 +185,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) /* two LSB bits are blink rate */ LEDR, 2, } - + /* PS/2 keyboard (seems to be important for WinXP install) */ Device (KBD) { diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 04a5206437..ea9870798c 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -5,7 +5,7 @@ * (Written by Yinghai Lu for AMD) * Copyright (C) 2006 MSI * (Written by Bingxun Shi for MSI) - * Copyright (C) 2008 Rudolf Marek + * Copyright (C) 2008 Rudolf Marek * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb index a5415a2bfe..29d706c62a 100644 --- a/src/mainboard/asus/mew-vm/devicetree.cb +++ b/src/mainboard/asus/mew-vm/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i82810 - device pci_domain 0 on + device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on # Onboard Video # device pci 1.0 on end diff --git a/src/mainboard/asus/mew-vm/irq_tables.c b/src/mainboard/asus/mew-vm/irq_tables.c index 3bd0d7195f..259b0e4938 100644 --- a/src/mainboard/asus/mew-vm/irq_tables.c +++ b/src/mainboard/asus/mew-vm/irq_tables.c @@ -1,4 +1,4 @@ -/* This file was generated by getpir.c, do not modify! +/* This file was generated by getpir.c, do not modify! * (but if you do, please run checkpir on it to verify) * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up * @@ -18,7 +18,7 @@ const struct irq_routing_table intel_irq_routing_table = { 0x7120, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x89, /* u8 checksum , this has to set to some value + 0x89, /* u8 checksum , this has to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ diff --git a/src/mainboard/azza/Kconfig b/src/mainboard/azza/Kconfig index f7109ecbf7..0c0be97d46 100644 --- a/src/mainboard/azza/Kconfig +++ b/src/mainboard/azza/Kconfig @@ -21,7 +21,7 @@ choice prompt "Mainboard model" depends on VENDOR_AZZA - + source "src/mainboard/azza/pt-6ibd/Kconfig" endchoice diff --git a/src/mainboard/biostar/Kconfig b/src/mainboard/biostar/Kconfig index 73bdfc20d8..85fad0a4f1 100644 --- a/src/mainboard/biostar/Kconfig +++ b/src/mainboard/biostar/Kconfig @@ -21,7 +21,7 @@ choice prompt "Mainboard model" depends on VENDOR_BIOSTAR - + source "src/mainboard/biostar/m6tba/Kconfig" endchoice diff --git a/src/mainboard/broadcom/Kconfig b/src/mainboard/broadcom/Kconfig index bf956ecdb3..d7406c0b45 100644 --- a/src/mainboard/broadcom/Kconfig +++ b/src/mainboard/broadcom/Kconfig @@ -1,7 +1,7 @@ choice prompt "Mainboard model" depends on VENDOR_BROADCOM - + source "src/mainboard/broadcom/blast/Kconfig" endchoice diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb index a9cabe6bea..d06c590bf8 100644 --- a/src/mainboard/broadcom/blast/devicetree.cb +++ b/src/mainboard/broadcom/blast/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/amd/amdk8/root_complex end device pci_domain 0 on chip northbridge/amd/amdk8 - device pci 18.0 on # northbridge + device pci 18.0 on # northbridge # devices on link 0 chip southbridge/broadcom/bcm5780 # HT2000 device pci 0.0 on end # PXB 1 0x0130 @@ -95,7 +95,7 @@ chip northbridge/amd/amdk8/root_complex device pnp 2e.10 on #RTC io 0x60 = 0x70 io 0x62 = 0x72 - end + end end end device pci 1.3 on end # WDTimer 0x0238 @@ -110,7 +110,7 @@ chip northbridge/amd/amdk8/root_complex end # device pci 18.0 device pci 18.0 on end - device pci 18.0 on end + device pci 18.0 on end device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end diff --git a/src/mainboard/broadcom/blast/get_bus_conf.c b/src/mainboard/broadcom/blast/get_bus_conf.c index 9d1a4b1bf0..06f42f4092 100644 --- a/src/mainboard/broadcom/blast/get_bus_conf.c +++ b/src/mainboard/broadcom/blast/get_bus_conf.c @@ -21,7 +21,7 @@ unsigned char bus_bcm5785_1_1 = 9; unsigned apicid_bcm5785[3]; -unsigned pci1234x[] = +unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail 0x0000ff0, @@ -115,9 +115,9 @@ void get_bus_conf(void) /*I/O APICs: APIC ID Version State Address*/ #if CONFIG_LOGICAL_CPUS==1 apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; +#else + apicid_base = CONFIG_MAX_PHYSICAL_CPUS; #endif - for(i=0;i<3;i++) + for(i=0;i<3;i++) apicid_bcm5785[i] = apicid_base+i; } diff --git a/src/mainboard/broadcom/blast/irq_tables.c b/src/mainboard/broadcom/blast/irq_tables.c index 3f6f73893e..406419d6d8 100644 --- a/src/mainboard/broadcom/blast/irq_tables.c +++ b/src/mainboard/broadcom/blast/irq_tables.c @@ -1,4 +1,4 @@ -/* This file was generated by getpir.c, do not modify! +/* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up @@ -16,7 +16,7 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, uint8_t slot, uint8_t rfu) { - pirq_info->bus = bus; + pirq_info->bus = bus; pirq_info->devfn = devfn; pirq_info->irq[0].link = link0; @@ -64,22 +64,22 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq = (void *)(addr); v = (uint8_t *)(addr); - + pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - + pirq->rtr_bus = bus_bcm5785_0; pirq->rtr_devfn = (sysconf.sbdn<<3)|0; pirq->exclusive_irqs = 0; - + pirq->rtr_vendor = 0x1166; pirq->rtr_device = 0x0036; pirq->miniport_data = 0; memset(pirq->rfu, 0, sizeof(pirq->rfu)); - + get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c pirq_info = (void *) ( &pirq->checksum + 1); @@ -87,11 +87,11 @@ unsigned long write_pirq_routing_table(unsigned long addr) //pci bridge write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; - - pirq->size = 32 + 16 * slot_num; + + pirq->size = 32 + 16 * slot_num; for (i = 0; i < pirq->size; i++) - sum += v[i]; + sum += v[i]; sum = pirq->checksum - sum; diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c index 8a1b133bfb..d24630844e 100644 --- a/src/mainboard/broadcom/blast/mptable.c +++ b/src/mainboard/broadcom/blast/mptable.c @@ -72,12 +72,12 @@ static void *smp_write_config_table(void *v) } } } - + } - + /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_bcm5785[0], 0x0); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_bcm5785[0], 0x1); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_bcm5785[0], 0x1); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_bcm5785[0], 0x2); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid_bcm5785[0], 0x3); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid_bcm5785[0], 0x4); @@ -89,7 +89,7 @@ static void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid_bcm5785[0], 0xc); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_bcm5785[0], 0xd); -//IDE +//IDE outb(0x02, 0xc00); outb(0x0e, 0xc01); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, apicid_bcm5785[0], 0xe); // IDE @@ -97,14 +97,14 @@ static void *smp_write_config_table(void *v) //SATA outb(0x07, 0xc00); outb(0x0f, 0xc01); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1, (0x0e<<2)|0, apicid_bcm5785[0], 0xf); - + //USB outb(0x01, 0xc00); outb(0x0a, 0xc01); for(i=0;i<3;i++) { smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); // } - + /* enable int */ /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ @@ -127,13 +127,13 @@ static void *smp_write_config_table(void *v) } -//pci slot (on bcm5785) +//pci slot (on bcm5785) for(i=0;i<4;i++) { smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (4<<2)|i, apicid_bcm5785[1], i%2); // } -//onboard ati +//onboard ati smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (5<<2)|0, apicid_bcm5785[1], 0x1); //PCI-X on bcm5780 @@ -157,7 +157,7 @@ static void *smp_write_config_table(void *v) } -// Second PCI-E x8 +// Second PCI-E x8 for(i=0;i<4;i++) { smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[3], (0<<2)|i, apicid_bcm5785[1], 0xc); // } diff --git a/src/mainboard/broadcom/blast/resourcemap.c b/src/mainboard/broadcom/blast/resourcemap.c index 438605c701..71f0bba010 100644 --- a/src/mainboard/broadcom/blast/resourcemap.c +++ b/src/mainboard/broadcom/blast/resourcemap.c @@ -119,7 +119,7 @@ static void setup_blast_resource_map(void) PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000, - PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00, + PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00, /* Memory-Mapped I/O Base i Registers * F1:0x80 i = 0 @@ -144,7 +144,7 @@ static void setup_blast_resource_map(void) * 1 = base/limit registers i are read-only * [ 7: 4] Reserved * [31: 8] Memory-Mapped I/O Base Address i (39-16) - * This field defines the upper address bits of a 40bit address + * This field defines the upper address bits of a 40bit address * that defines the start of memory-mapped I/O region i */ PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000, @@ -181,7 +181,7 @@ static void setup_blast_resource_map(void) * This field defines the end of PCI I/O region n * [31:25] Reserved */ - PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000, + PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000, PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000, @@ -200,7 +200,7 @@ static void setup_blast_resource_map(void) * [ 3: 2] Reserved * [ 4: 4] VGA Enable * 0 = VGA matches Disabled - * 1 = matches all address < 64K and where A[9:0] is in the + * 1 = matches all address < 64K and where A[9:0] is in the * range 3B0-3BB or 3C0-3DF independen of the base & limit registers * [ 5: 5] ISA Enable * 0 = ISA matches Disabled @@ -208,7 +208,7 @@ static void setup_blast_resource_map(void) * from matching agains this base/limit pair * [11: 6] Reserved * [24:12] PCI I/O Base i - * This field defines the start of PCI I/O region n + * This field defines the start of PCI I/O region n * [31:25] Reserved */ PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003, @@ -252,8 +252,8 @@ static void setup_blast_resource_map(void) * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration regin i */ - PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x08000003, - PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x08000003, + PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index 35823bd47c..13f5f97414 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -3,7 +3,7 @@ #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif - + #include #include #include @@ -75,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" /* tyan does not want the default */ -#include "resourcemap.c" +#include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" @@ -109,7 +109,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct mem_controller ctrl[8]; unsigned nodes; - if (!cpu_init_detectedx && boot_cpu()) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ @@ -130,7 +130,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); // post_code(0x33); - + uart_init(); // post_code(0x34); @@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); setup_blast_resource_map(); - + #if 0 dump_pci_device(PCI_DEV(0, 0x18, 0)); dump_pci_device(PCI_DEV(0, 0x19, 0)); @@ -174,7 +174,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_smbus(); -#if 0 +#if 0 int i; for(i=4;i<8;i++) { change_i2c_mux(i); diff --git a/src/mainboard/compaq/Kconfig b/src/mainboard/compaq/Kconfig index 160048f30f..c2bbb57120 100644 --- a/src/mainboard/compaq/Kconfig +++ b/src/mainboard/compaq/Kconfig @@ -21,7 +21,7 @@ choice prompt "Mainboard model" depends on VENDOR_COMPAQ - + source "src/mainboard/compaq/deskpro_en_sff_p600/Kconfig" endchoice diff --git a/src/mainboard/dell/s1850/debug.c b/src/mainboard/dell/s1850/debug.c index 2ea3db32ea..45315618b7 100644 --- a/src/mainboard/dell/s1850/debug.c +++ b/src/mainboard/dell/s1850/debug.c @@ -5,7 +5,7 @@ static void print_reg(unsigned char index) { unsigned char data; - + outb(index, 0x2e); data = inb(0x2f); print_debug("0x"); @@ -15,7 +15,7 @@ static void print_reg(unsigned char index) print_debug("\n"); return; } - + static void xbus_en(void) { /* select the XBUS function in the SIO */ @@ -25,7 +25,7 @@ static void xbus_en(void) outb(0x01, 0x2f); return; } - + static void setup_func(unsigned char func) { /* select the function in the SIO */ @@ -43,27 +43,27 @@ static void setup_func(unsigned char func) print_reg(0x75); return; } - + static void siodump(void) { int i; unsigned char data; - + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } -#if 0 +#if 0 print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); @@ -82,13 +82,13 @@ static void siodump(void) print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); print_debug("\n"); - -#if 0 - + +#if 0 + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); @@ -103,11 +103,11 @@ static void siodump(void) print_reg(0xf7); print_reg(0xfe); print_reg(0xff); - + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); -#endif +#endif return; } @@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev) static void print_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; id = pci_read_config32(dev, PCI_VENDOR_ID); @@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev) int i; print_debug_pci_dev(dev); print_debug("\n"); - + for(i = 0; i <= 255; i++) { unsigned char val; if ((i & 0x0f) == 0) { @@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev) { int i; unsigned long bar; - + print_debug("BAR 14 Dump\n"); - + bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { -#if 0 +#if 0 unsigned char val; if ((i & 0x0f) == 0) { print_debug_hex8(i); print_debug_char(':'); } val = pci_read_config8(dev, i); -#endif +#endif if((i%4)==0) { print_debug("\n"); print_debug_hex16(i); @@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev) static void dump_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; id = pci_read_config32(dev, PCI_VENDOR_ID); @@ -215,7 +215,7 @@ void dump_spd_registers(void) print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); - + for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { @@ -228,7 +228,7 @@ void dump_spd_registers(void) print_debug("bad device: "); print_debug_hex8(-status); print_debug("\n"); - break; + break; } print_debug_hex8(status); print_debug_char(' '); @@ -248,7 +248,7 @@ void show_dram_slots(void) print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); - + status = smbus_read_byte(device, 0); if (status < 0) { print_debug("bad device: "); @@ -272,7 +272,7 @@ void dump_ipmi_registers(void) print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); - + for(i = 0; (i < 8) ; i++) { unsigned char byte; status = smbus_read_byte(device, 2); @@ -280,7 +280,7 @@ void dump_ipmi_registers(void) print_debug("bad device: "); print_debug_hex8(-status); print_debug("\n"); - break; + break; } print_debug_hex8(status); print_debug_char(' '); @@ -288,4 +288,4 @@ void dump_ipmi_registers(void) device += SMBUS_MEM_DEVICE_INC; print_debug("\n"); } -} +} diff --git a/src/mainboard/dell/s1850/devicetree.cb b/src/mainboard/dell/s1850/devicetree.cb index ab95e54a7b..bd7b3a3773 100644 --- a/src/mainboard/dell/s1850/devicetree.cb +++ b/src/mainboard/dell/s1850/devicetree.cb @@ -1,23 +1,23 @@ chip northbridge/intel/e7520 # mch - device pci_domain 0 on + device pci_domain 0 on chip southbridge/intel/i82801ex # i82801er # USB ports device pci 1d.0 on end device pci 1d.1 on end - device pci 1d.2 on end + device pci 1d.2 on end device pci 1d.3 on end device pci 1d.7 on end - + # -> Bridge device pci 1e.0 on end - + # -> ISA - device pci 1f.0 on + device pci 1f.0 on chip superio/nsc/pc8374 device pnp 2e.0 off end device pnp 2e.1 off end device pnp 2e.2 off end - device pnp 2e.3 on + device pnp 2e.3 on io 0x60 = 0x3f8 irq 0x70 = 4 end @@ -30,22 +30,22 @@ chip northbridge/intel/e7520 # mch end # -> IDE device pci 1f.1 on end - # -> SATA + # -> SATA device pci 1f.2 on end device pci 1f.3 on end register "pirq_a_d" = "0x8a07030b" register "pirq_e_h" = "0x85808080" end - device pci 00.0 on end + device pci 00.0 on end device pci 00.1 on end - device pci 01.0 on end - device pci 02.0 on + device pci 01.0 on end + device pci 02.0 on chip southbridge/intel/pxhd # pxhd1 # Bus bridges and ioapics usually bus 1 - device pci 0.0 on + device pci 0.0 on # On board gig e1000 - chip drivers/generic/generic + chip drivers/generic/generic device pci 03.0 on end device pci 03.1 on end end diff --git a/src/mainboard/dell/s1850/irq_tables.c b/src/mainboard/dell/s1850/irq_tables.c index 8b4773df66..1f56ed30b9 100644 --- a/src/mainboard/dell/s1850/irq_tables.c +++ b/src/mainboard/dell/s1850/irq_tables.c @@ -1,8 +1,8 @@ /* * This file is part of the coreboot project. * - * Copyright (C) by the coreboot pirq tool. - * This file was programatically generated. + * Copyright (C) by the coreboot pirq tool. + * This file was programatically generated. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/mainboard/dell/s1850/mptable.c b/src/mainboard/dell/s1850/mptable.c index c7fd52af3e..4cdd0f1e7b 100644 --- a/src/mainboard/dell/s1850/mptable.c +++ b/src/mainboard/dell/s1850/mptable.c @@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v) mc->reserved = 0; smp_write_processors(mc); - + { device_t dev; @@ -98,9 +98,9 @@ static void *smp_write_config_table(void *v) bus_pxhd_4 = 6; } - + } - + /* define bus and isa numbers */ for(bus_num = 0; bus_num < bus_isa; bus_num++) { smp_write_bus(mc, bus_num, "PCI "); @@ -135,7 +135,7 @@ static void *smp_write_config_table(void *v) else { printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n"); } - } + } /* ISA backward compatibility interrupts */ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x00, 0x02, 0x00); diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c index 199c6ea5d5..07fbef282d 100644 --- a/src/mainboard/dell/s1850/romstage.c +++ b/src/mainboard/dell/s1850/romstage.c @@ -65,7 +65,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) static inline void ibfzero(void) { - while(inb(ipmicsr) & (1<