From 00ad48554a32d10d82122720b34a3d7faab62d1f Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Fri, 23 Aug 2019 10:32:56 -0700 Subject: mb/google/drallion: Enable HDA for drallion platform Enable PchHdaIDispCodecDisconnect and PchHdaAudioLinkHda for drallion variants. This is needed with FSP 1263. Signed-off-by: Selma BENSAID Change-Id: I13d3dd832c6fbdc2aad5ba578695edb8470806e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35079 Tested-by: build bot (Jenkins) Reviewed-by: Sathyanarayana Nujella Reviewed-by: Furquan Shaikh --- src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb | 4 ++++ src/mainboard/google/drallion/variants/drallion/devicetree.cb | 4 ++++ src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb | 4 ++++ 3 files changed, 12 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb b/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb index fe3b6c9cb1..3628264f8a 100644 --- a/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb +++ b/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb @@ -50,6 +50,10 @@ chip soc/intel/cannonlake # Enable DDC for DDI port B register "DdiPortBDdc" = "1" + # Disable iDisplay codec enumeration + register "PchHdaIDispCodecDisconnect" = "1" + register "PchHdaAudioLinkHda" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 54184f0a41..8870126759 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -50,6 +50,10 @@ chip soc/intel/cannonlake # Enable DDC for DDI port B register "DdiPortBDdc" = "1" + # Disable iDisplay codec enumeration + register "PchHdaIDispCodecDisconnect" = "1" + register "PchHdaAudioLinkHda" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb b/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb index d3aab62a68..84aacd58ec 100644 --- a/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb +++ b/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb @@ -56,6 +56,10 @@ chip soc/intel/cannonlake register "LanWakeFromDeepSx" = "0" register "WolEnableOverride" = "0" + # Disable iDisplay codec enumeration + register "PchHdaIDispCodecDisconnect" = "1" + register "PchHdaAudioLinkHda" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | -- cgit v1.2.3