From 5a1f5970857a5ad1fda0cf9d5945192408bf537b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 31 Mar 2010 14:34:40 +0000 Subject: This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/via/epia-cn/romstage.c | 2 +- src/mainboard/via/epia-m/romstage.c | 2 +- src/mainboard/via/epia-m700/romstage.c | 10 ++++------ src/mainboard/via/epia-n/romstage.c | 2 +- src/mainboard/via/epia/romstage.c | 2 +- src/mainboard/via/pc2500e/romstage.c | 2 +- src/mainboard/via/vt8454c/romstage.c | 2 +- 7 files changed, 10 insertions(+), 12 deletions(-) (limited to 'src/mainboard/via') diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c index 1c4969c322..960a738b6d 100644 --- a/src/mainboard/via/epia-cn/romstage.c +++ b/src/mainboard/via/epia-cn/romstage.c @@ -27,7 +27,7 @@ #include #include #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/cn700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/via/epia-m/romstage.c b/src/mainboard/via/epia-m/romstage.c index 9dcb4a8939..2d741a1246 100644 --- a/src/mainboard/via/epia-m/romstage.c +++ b/src/mainboard/via/epia-m/romstage.c @@ -10,7 +10,7 @@ #include #include #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/vt8623/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index 451a7ba7e1..80de0afc71 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -33,16 +33,14 @@ #include #include #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/vx800/vx800.h" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "pc80/udelay_io.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 #include -#endif #include "cpu/x86/lapic/boot_cpu.c" /* This file contains the board-special SI value for raminit.c. */ @@ -726,7 +724,7 @@ void amd64_main(unsigned long bist) */ unsigned v_esp; __asm__ volatile ("movl %%esp, %0\n\t":"=a" (v_esp)); -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "v_esp=%08x\r\n", v_esp); #else print_debug("v_esp="); @@ -745,7 +743,7 @@ cpu_reset_x: */ cpu_reset = 0; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "cpu_reset = %08x\r\n", cpu_reset); #else print_debug("cpu_reset = "); @@ -795,7 +793,7 @@ cpu_reset_x: else print_debug("Use Ram as Stack now - \r\n"); -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "new_cpu_reset = %08x\r\n", new_cpu_reset); #else print_debug("new_cpu_reset = "); diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c index 5f3ebc3210..9819048a25 100644 --- a/src/mainboard/via/epia-n/romstage.c +++ b/src/mainboard/via/epia-n/romstage.c @@ -27,7 +27,7 @@ #include #include #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/cn400/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/via/epia/romstage.c b/src/mainboard/via/epia/romstage.c index 1b5e9e21b8..301556ddaf 100644 --- a/src/mainboard/via/epia/romstage.c +++ b/src/mainboard/via/epia/romstage.c @@ -6,7 +6,7 @@ #include #include #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/vt8601/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c index 9bfaefffc4..71ad25908a 100644 --- a/src/mainboard/via/pc2500e/romstage.c +++ b/src/mainboard/via/pc2500e/romstage.c @@ -28,7 +28,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/cn700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c index 168e496f22..719a3581e6 100644 --- a/src/mainboard/via/vt8454c/romstage.c +++ b/src/mainboard/via/vt8454c/romstage.c @@ -27,7 +27,7 @@ #include #include #include "pc80/serial.c" -#include "arch/i386/lib/console.c" +#include "console/console.c" #include "lib/ramtest.c" #include "northbridge/via/cx700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" -- cgit v1.2.3