From 240ef7c7691a29e96f7710b2f6d6d95b5bb53d13 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 6 Jun 2009 07:19:53 +0000 Subject: Change the CBFS build process to use coreboot.rom instead of coreboot.strip. That fixes the normal image because the calculations for its offset in the ROM match reality again. This requires changes in CBFS configurations to minimize the bootblock size. These are also done for CBFS boards. Other than this a couple of minor fixes are in this patch: - make asus/m2v-mx_se build with abuild with a crosscompiler - move CONFIG_CBFS for hp/dl145_g3 to Options.lb as it's done everywhere else - change the default config of abuild to not provide ROM_IMAGE_SIZE values for the images in a CBFS configuration - change abuild's crosscompile autodetection to not try to use "i386-elf-i386-elf-gcc" (which is bogus) Except for the latter two abuild changes (both in util/abuild/abuild), they're available as patch set on the mailing list in a mail from 2009-06-05 titled [PATCH]es to get normal image to work again with CBFS The changes in util/abuild/abuild are trivial and abuild tested. As discussed on the list, targets/hp/dl145_g3/Config-abuild.lb is deleted, now that Config.lb works again. Signed-off-by: Patrick Georgi Acked-by: Ronald G. Minnich Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/via/vt8454c/Options.lb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/via/vt8454c') diff --git a/src/mainboard/via/vt8454c/Options.lb b/src/mainboard/via/vt8454c/Options.lb index d9cf995cdf..3f1bdb768b 100644 --- a/src/mainboard/via/vt8454c/Options.lb +++ b/src/mainboard/via/vt8454c/Options.lb @@ -158,7 +158,7 @@ default CONFIG_IOAPIC=1 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. default ROM_IMAGE_SIZE = 65536 -default FALLBACK_SIZE = 131072 +default FALLBACK_SIZE = ROM_IMAGE_SIZE ## ## Use a small 8K stack -- cgit v1.2.3