From 0ffff3434e610cf38c8eb06a3f1b1dece92652fa Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 7 Jun 2009 13:46:50 +0000 Subject: First bunch of coding style and consistency cleanups for the EPIA-M700 target. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4349 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/via/epia-m700/Options.lb | 59 ++++++++++++++-------------------- 1 file changed, 24 insertions(+), 35 deletions(-) (limited to 'src/mainboard/via/epia-m700/Options.lb') diff --git a/src/mainboard/via/epia-m700/Options.lb b/src/mainboard/via/epia-m700/Options.lb index a788f29395..240817543f 100644 --- a/src/mainboard/via/epia-m700/Options.lb +++ b/src/mainboard/via/epia-m700/Options.lb @@ -67,11 +67,7 @@ uses TTYS0_BAUD uses CONFIG_VIDEO_MB uses CONFIG_IOAPIC - - -## -## new options -## +## New options uses USE_DCACHE_RAM uses DCACHE_RAM_BASE uses DCACHE_RAM_SIZE @@ -88,33 +84,31 @@ uses VIACONFIG_TOP_SM_SIZE_MB uses VIACONFIG_VGA_PCI_10 uses VIACONFIG_VGA_PCI_14 -## -## new options -## -default USE_DCACHE_RAM=1 -default DCACHE_RAM_BASE=0xffef0000 -#default DCACHE_RAM_BASE=0xffbf0000 -#default DCACHE_RAM_BASE=0xfec00000 //hpet may use this -default DCACHE_RAM_SIZE=0x2000 -default CONFIG_USE_INIT=0 -default MAX_RAM_SLOTS=2 -default USB_ENABLE=1 -default EHCI_ENABLE=1 -default HPET_ENABLE=1 -default USB_PORTNUM=2 +## New options +default USE_DCACHE_RAM = 1 +default DCACHE_RAM_BASE = 0xffef0000 +# default DCACHE_RAM_BASE = 0xffbf0000 +# default DCACHE_RAM_BASE = 0xfec00000 # HPET may use this. +default DCACHE_RAM_SIZE = 8 * 1024 +default CONFIG_USE_INIT = 0 +default MAX_RAM_SLOTS = 2 +default USB_ENABLE = 1 +default EHCI_ENABLE = 1 +default HPET_ENABLE = 1 +default USB_PORTNUM = 2 default FULL_ROM_SIZE = 512 * 1024 -default FULL_ROM_BASE = (0xffffffff - FULL_ROM_SIZE+ 1) -default VIACONFIG_TOP_SM_SIZE_MB=0 -#default VIACONFIG_VGA_PCI_10=0xd0000008 -#default VIACONFIG_VGA_PCI_14=0xfd000000 -default VIACONFIG_VGA_PCI_10=0xf8000008 -default VIACONFIG_VGA_PCI_14=0xfc000000 - +default FULL_ROM_BASE = (0xffffffff - FULL_ROM_SIZE + 1) +default VIACONFIG_TOP_SM_SIZE_MB = 0 +# default VIACONFIG_VGA_PCI_10 = 0xd0000008 +# default VIACONFIG_VGA_PCI_14 = 0xfd000000 +default VIACONFIG_VGA_PCI_10 = 0xf8000008 +default VIACONFIG_VGA_PCI_14 = 0xfc000000 default ROM_SIZE = 512 * 1024 default CONFIG_IOAPIC = 1 -#define framebuffer size of VX800's integrated graphics card. support 32 64 128 256 +# Define framebuffer size of VX800's integrated graphics card. +# Supports: 32, 64, 128, 256. default CONFIG_VIDEO_MB = 64 default CONFIG_CONSOLE_SERIAL8250 = 1 @@ -126,7 +120,7 @@ default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default HAVE_HARD_RESET = 0 default HAVE_PIRQ_TABLE = 0 -default IRQ_SLOT_COUNT = 10 +default IRQ_SLOT_COUNT = 10 # FIXME. irq_table.c says 14. default HAVE_ACPI_TABLES = 1 default HAVE_OPTION_TABLE = 1 default ROM_IMAGE_SIZE = 128 * 1024 @@ -134,13 +128,14 @@ default FALLBACK_SIZE = ROM_SIZE default USE_FALLBACK_IMAGE = 1 default STACK_SIZE = 16 * 1024 default HEAP_SIZE = 20 * 1024 -#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE +# default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE default USE_OPTION_TABLE = 0 default _RAMBASE = 0x00004000 default CONFIG_ROM_PAYLOAD = 1 default CROSS_COMPILE = "" default CC = "$(CROSS_COMPILE)gcc -m32" default HOSTCC = "gcc" +default CONFIG_CBFS = 0 ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. @@ -148,11 +143,5 @@ default HOSTCC = "gcc" ## time when it can't find a device. ## default CONFIG_MAX_PCI_BUSES = 3 -end -# -# CBFS -# -# -default CONFIG_CBFS=0 end -- cgit v1.2.3