From 77757c22b9eede92234d07d65a23fdf4b970c8cf Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 4 Jan 2015 21:33:39 +1100 Subject: mainboard/*/romstage.c: Sanitize system header inclusions Fix system include paths to be consistent. Chipset support is part of the Coreboot 'system' and hence 'non-local' (i.e., in the same directory or context). One possible product of this, is to perhaps allow future work to do pre-compiled headers (PCH) on the buildbot for faster build times. However, this currently just makes mainboard's consistent. Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/8085 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/mainboard/tyan/s1846/romstage.c | 6 +++--- src/mainboard/tyan/s2735/romstage.c | 4 ++-- src/mainboard/tyan/s2850/romstage.c | 4 ++-- src/mainboard/tyan/s2875/romstage.c | 4 ++-- src/mainboard/tyan/s2880/romstage.c | 4 ++-- src/mainboard/tyan/s2881/romstage.c | 4 ++-- src/mainboard/tyan/s2882/romstage.c | 4 ++-- src/mainboard/tyan/s2885/romstage.c | 4 ++-- src/mainboard/tyan/s2891/romstage.c | 10 +++++----- src/mainboard/tyan/s2892/romstage.c | 10 +++++----- src/mainboard/tyan/s2895/romstage.c | 10 +++++----- src/mainboard/tyan/s2912/romstage.c | 10 +++++----- src/mainboard/tyan/s2912_fam10/romstage.c | 14 +++++++------- src/mainboard/tyan/s4880/romstage.c | 4 ++-- src/mainboard/tyan/s4882/romstage.c | 4 ++-- src/mainboard/tyan/s8226/romstage.c | 6 +++--- 16 files changed, 51 insertions(+), 51 deletions(-) (limited to 'src/mainboard/tyan') diff --git a/src/mainboard/tyan/s1846/romstage.c b/src/mainboard/tyan/s1846/romstage.c index 10af34da25..201e6860b3 100644 --- a/src/mainboard/tyan/s1846/romstage.c +++ b/src/mainboard/tyan/s1846/romstage.c @@ -24,11 +24,11 @@ #include #include #include -#include "southbridge/intel/i82371eb/i82371eb.h" -#include "northbridge/intel/i440bx/raminit.h" +#include +#include #include "drivers/pc80/udelay_io.c" #include "lib/delay.c" -#include "cpu/x86/bist.h" +#include #include #include diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c index 5d4fd0e780..514aa61eb0 100644 --- a/src/mainboard/tyan/s2735/romstage.c +++ b/src/mainboard/tyan/s2735/romstage.c @@ -9,11 +9,11 @@ #include #include #include "southbridge/intel/i82801ex/early_smbus.c" -#include "northbridge/intel/e7501/raminit.h" +#include #include "northbridge/intel/e7501/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c index 952b19d702..c6d3734c98 100644 --- a/src/mainboard/tyan/s2850/romstage.c +++ b/src/mainboard/tyan/s2850/romstage.c @@ -11,13 +11,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c index 8f87257814..ea2f4eb01b 100644 --- a/src/mainboard/tyan/s2875/romstage.c +++ b/src/mainboard/tyan/s2875/romstage.c @@ -11,13 +11,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c index 873652b503..0e1ac98303 100644 --- a/src/mainboard/tyan/s2880/romstage.c +++ b/src/mainboard/tyan/s2880/romstage.c @@ -11,13 +11,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c index c020f3eaf1..acfcec37b9 100644 --- a/src/mainboard/tyan/s2881/romstage.c +++ b/src/mainboard/tyan/s2881/romstage.c @@ -10,13 +10,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index 873652b503..0e1ac98303 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -11,13 +11,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c index df602ea263..d321a453e7 100644 --- a/src/mainboard/tyan/s2885/romstage.c +++ b/src/mainboard/tyan/s2885/romstage.c @@ -10,13 +10,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c index e97b026c99..4856d461ea 100644 --- a/src/mainboard/tyan/s2891/romstage.c +++ b/src/mainboard/tyan/s2891/romstage.c @@ -10,15 +10,15 @@ #include #include #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "southbridge/nvidia/ck804/early_smbus.h" -#include "northbridge/amd/amdk8/raminit.h" +#include +#include #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -37,7 +37,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "southbridge/nvidia/ck804/early_setup_ss.h" +#include #include "southbridge/nvidia/ck804/early_setup.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "northbridge/amd/amdk8/early_ht.c" diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c index 57da0724f9..4e11a1f58c 100644 --- a/src/mainboard/tyan/s2892/romstage.c +++ b/src/mainboard/tyan/s2892/romstage.c @@ -10,15 +10,15 @@ #include #include #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "southbridge/nvidia/ck804/early_smbus.h" -#include "northbridge/amd/amdk8/raminit.h" +#include +#include #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -36,7 +36,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "southbridge/nvidia/ck804/early_setup_ss.h" +#include //set GPIO to input mode #define CK804_MB_SETUP \ diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c index 0e42f76974..b2fe6fd341 100644 --- a/src/mainboard/tyan/s2895/romstage.c +++ b/src/mainboard/tyan/s2895/romstage.c @@ -10,14 +10,14 @@ #include #include #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "southbridge/nvidia/ck804/early_smbus.h" -#include "northbridge/amd/amdk8/raminit.h" +#include +#include #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include #include "northbridge/amd/amdk8/reset_test.c" #include #include "superio/smsc/lpc47b397/early_gpio.c" -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/debug.c" #include #include "northbridge/amd/amdk8/setup_resource_map.c" @@ -51,7 +51,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "southbridge/nvidia/ck804/early_setup_ss.h" +#include //set GPIO to input mode #define CK804_MB_SETUP \ diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 55cb95e7d0..f62e5166f1 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -32,13 +32,13 @@ #include #include #include "southbridge/nvidia/mcp55/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include #include "northbridge/amd/amdk8/reset_test.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/nvidia/mcp55/early_ctrl.c" @@ -53,7 +53,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/f.h" +#include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" @@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */ -#include "southbridge/nvidia/mcp55/early_setup_ss.h" +#include #include "southbridge/nvidia/mcp55/early_setup_car.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 3e0f8f3dbb..77173adb0a 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -34,14 +34,14 @@ #include #include #include "southbridge/nvidia/mcp55/early_smbus.c" -#include "northbridge/amd/amdfam10/raminit.h" -#include "northbridge/amd/amdfam10/amdfam10.h" +#include +#include #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include #include "northbridge/amd/amdfam10/reset_test.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdfam10/debug.c" #include "northbridge/amd/amdfam10/setup_resource_map.c" #include "southbridge/nvidia/mcp55/early_ctrl.c" @@ -55,7 +55,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdfam10/amdfam10.h" +#include #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" @@ -69,9 +69,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */ -#include "southbridge/nvidia/mcp55/early_setup_ss.h" +#include #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "cpu/amd/microcode.h" +#include #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c index c106b1ceaa..53432af23b 100644 --- a/src/mainboard/tyan/s4880/romstage.c +++ b/src/mainboard/tyan/s4880/romstage.c @@ -10,13 +10,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c index 17379b5ac2..c0a3918194 100644 --- a/src/mainboard/tyan/s4882/romstage.c +++ b/src/mainboard/tyan/s4882/romstage.c @@ -9,13 +9,13 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include #include -#include "cpu/x86/bist.h" +#include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c index ac28874a30..e14292e061 100644 --- a/src/mainboard/tyan/s8226/romstage.c +++ b/src/mainboard/tyan/s8226/romstage.c @@ -24,11 +24,11 @@ #include #include #include -#include "cpu/x86/bist.h" -#include "cpu/x86/lapic.h" +#include +#include #include #include -#include "northbridge/amd/agesa/family10/reset_test.h" +#include #include #include #include -- cgit v1.2.3