From 6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 21 Nov 2010 11:36:03 +0000 Subject: Use DIMM0 et al in lots more places instead of hardocding values. The (0xa << 3) expression equals 0x50, i.e. DIMM0. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/tyan/s2735/romstage.c | 5 +++-- src/mainboard/tyan/s2850/romstage.c | 5 +++-- src/mainboard/tyan/s2875/romstage.c | 9 +++++---- src/mainboard/tyan/s2880/romstage.c | 9 +++++---- src/mainboard/tyan/s2881/romstage.c | 9 +++++---- src/mainboard/tyan/s2882/romstage.c | 9 +++++---- src/mainboard/tyan/s2885/romstage.c | 9 +++++---- src/mainboard/tyan/s2891/romstage.c | 9 +++++---- src/mainboard/tyan/s2892/romstage.c | 9 +++++---- src/mainboard/tyan/s2895/romstage.c | 9 +++++---- src/mainboard/tyan/s2912/romstage.c | 9 +++++---- 11 files changed, 51 insertions(+), 40 deletions(-) (limited to 'src/mainboard/tyan') diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c index d117112c3d..8e765a173a 100644 --- a/src/mainboard/tyan/s2735/romstage.c +++ b/src/mainboard/tyan/s2735/romstage.c @@ -9,6 +9,7 @@ #include #include #include +#include #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" @@ -44,8 +45,8 @@ void main(unsigned long bist) { .d0 = PCI_DEV(0, 0, 0), .d0f1 = PCI_DEV(0, 0, 1), - .channel0 = { (0xa<<3)|0, (0xa<<3)|1, (0xa<<3)|2, 0 }, - .channel1 = { (0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, 0 }, + .channel0 = { DIMM0, DIMM1, DIMM2, 0 }, + .channel1 = { DIMM4, DIMM5, DIMM6, 0 }, }, }; diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c index 5ae6c95d75..2711e2441e 100644 --- a/src/mainboard/tyan/s2850/romstage.c +++ b/src/mainboard/tyan/s2850/romstage.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "northbridge/amd/amdk8/incoherent_ht.c" @@ -86,8 +87,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x18, 1), .f2 = PCI_DEV(0, 0x18, 2), .f3 = PCI_DEV(0, 0x18, 3), - .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 }, - .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 }, + .channel0 = { DIMM0, DIMM2, 0, 0 }, + .channel1 = { DIMM1, DIMM3, 0, 0 }, }, }; diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c index 3d97099be5..728d2ecb72 100644 --- a/src/mainboard/tyan/s2875/romstage.c +++ b/src/mainboard/tyan/s2875/romstage.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "northbridge/amd/amdk8/incoherent_ht.c" @@ -87,8 +88,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x18, 1), .f2 = PCI_DEV(0, 0x18, 2), .f3 = PCI_DEV(0, 0x18, 3), - .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 }, - .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 }, + .channel0 = { DIMM0, DIMM2, 0, 0 }, + .channel1 = { DIMM1, DIMM3, 0, 0 }, }, #if CONFIG_MAX_PHYSICAL_CPUS > 1 { @@ -97,8 +98,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x19, 1), .f2 = PCI_DEV(0, 0x19, 2), .f3 = PCI_DEV(0, 0x19, 3), - .channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 }, - .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 }, + .channel0 = { DIMM4, DIMM6, 0, 0 }, + .channel1 = { DIMM5, DIMM7, 0, 0 }, }, #endif }; diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c index e32f35a4eb..d3e8745355 100644 --- a/src/mainboard/tyan/s2880/romstage.c +++ b/src/mainboard/tyan/s2880/romstage.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "northbridge/amd/amdk8/incoherent_ht.c" @@ -87,8 +88,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x18, 1), .f2 = PCI_DEV(0, 0x18, 2), .f3 = PCI_DEV(0, 0x18, 3), - .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 }, - .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 }, + .channel0 = { DIMM0, DIMM2, 0, 0 }, + .channel1 = { DIMM1, DIMM3, 0, 0 }, }, #if CONFIG_MAX_PHYSICAL_CPUS > 1 { @@ -97,8 +98,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x19, 1), .f2 = PCI_DEV(0, 0x19, 2), .f3 = PCI_DEV(0, 0x19, 3), - .channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 }, - .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 }, + .channel0 = { DIMM4, DIMM6, 0, 0 }, + .channel1 = { DIMM5, DIMM7, 0, 0 }, }, #endif }; diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c index ee3c3f0b69..c347e98cc9 100644 --- a/src/mainboard/tyan/s2881/romstage.c +++ b/src/mainboard/tyan/s2881/romstage.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -80,11 +81,11 @@ static inline int spd_read_byte(unsigned device, unsigned address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, #if CONFIG_MAX_PHYSICAL_CPUS > 1 - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, #endif }; diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index c050c2bf49..c17bc1376c 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "northbridge/amd/amdk8/incoherent_ht.c" @@ -85,8 +86,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x18, 1), .f2 = PCI_DEV(0, 0x18, 2), .f3 = PCI_DEV(0, 0x18, 3), - .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 }, - .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 }, + .channel0 = { DIMM0, DIMM2, 0, 0 }, + .channel1 = { DIMM1, DIMM3, 0, 0 }, }, #if CONFIG_MAX_PHYSICAL_CPUS > 1 { @@ -95,8 +96,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) .f1 = PCI_DEV(0, 0x19, 1), .f2 = PCI_DEV(0, 0x19, 2), .f3 = PCI_DEV(0, 0x19, 3), - .channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 }, - .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 }, + .channel0 = { DIMM4, DIMM6, 0, 0 }, + .channel1 = { DIMM5, DIMM7, 0, 0 }, }, #endif }; diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c index deae2bbfdb..ab9b8d3077 100644 --- a/src/mainboard/tyan/s2885/romstage.c +++ b/src/mainboard/tyan/s2885/romstage.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -83,11 +84,11 @@ static inline int spd_read_byte(unsigned device, unsigned address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, #if CONFIG_MAX_PHYSICAL_CPUS > 1 - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, #endif }; diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c index 8c490a9006..973995e4af 100644 --- a/src/mainboard/tyan/s2891/romstage.c +++ b/src/mainboard/tyan/s2891/romstage.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -93,11 +94,11 @@ static void sio_setup(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, #if CONFIG_MAX_PHYSICAL_CPUS > 1 - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, #endif }; diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c index 447fecfaaf..1cf18258e7 100644 --- a/src/mainboard/tyan/s2892/romstage.c +++ b/src/mainboard/tyan/s2892/romstage.c @@ -9,6 +9,7 @@ #include #include +#include #include @@ -88,11 +89,11 @@ static void sio_setup(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, #if CONFIG_MAX_PHYSICAL_CPUS > 1 - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, #endif }; diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c index bb75a912cb..01e4280e24 100644 --- a/src/mainboard/tyan/s2895/romstage.c +++ b/src/mainboard/tyan/s2895/romstage.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/nvidia/ck804/ck804_early_smbus.h" @@ -112,10 +113,10 @@ static void sio_setup(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const u16 spd_addr [] = { - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, }; int needs_reset; diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index efb9525488..745c00081a 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -35,6 +35,7 @@ #include #include +#include #include #include @@ -130,11 +131,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { // Node 0 - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, // Node 1 - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, }; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE -- cgit v1.2.3