From 9434c1b661506e9f0b77896c87c36b39b9137da9 Mon Sep 17 00:00:00 2001
From: Yinghai Lu <yinghailu@gmail.com>
Date: Tue, 2 Nov 2004 02:34:28 +0000
Subject: Tyan update for ROM_IMAGE_SIZE > 64K

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/tyan/s4880/Config.lb | 43 ++++++++++++++++++++++----------------
 1 file changed, 25 insertions(+), 18 deletions(-)

(limited to 'src/mainboard/tyan/s4880/Config.lb')

diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb
index efaa7199db..e25b26c6e7 100644
--- a/src/mainboard/tyan/s4880/Config.lb
+++ b/src/mainboard/tyan/s4880/Config.lb
@@ -47,22 +47,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end
 ## Romcc output
 ##
 makerule ./failover.E
-	depends "$(MAINBOARD)/failover.c" 
-	action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
+        depends "$(MAINBOARD)/failover.c ./romcc"
+        action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
 end
 
 makerule ./failover.inc
-	depends "./failover.E ./romcc"
-	action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"
+        depends "$(MAINBOARD)/failover.c ./romcc"
+        action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
 end
 
-makerule ./auto.E 
-	depends	"$(MAINBOARD)/auto.c option_table.h"
-	action	"$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
+makerule ./auto.E
+        depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+        action  "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
 end
-makerule ./auto.inc 
-	depends "./auto.E ./romcc"
-	action	"./romcc -mcpu=k8 -O2 ./auto.E > auto.inc"
+makerule ./auto.inc
+        depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+        action  "./romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
 end
 
 ##
@@ -171,14 +171,21 @@ chip northbridge/amd/amdk8
                                 			irq 0x70 = 1
 							irq 0x72 = 12
 						end
-                        			device pnp 2e.6 off end #  CIR
-                        			device pnp 2e.7 off end #  GAME_MIDI_GIPO1
-                        			device pnp 2e.8 off end #  GPIO2
-                        			device pnp 2e.9 off end #  GPIO3
-                        			device pnp 2e.a off end #  ACPI
-                        			device pnp 2e.b on #  HW Monitor
- 				 			io 0x60 = 0x290
-                				end
+                                                device pnp 2e.6 off #  CIR
+                                                        io 0x60 = 0x100
+                                                end
+                                                device pnp 2e.7 off #  GAME_MIDI_GIPO1
+                                                        io 0x60 = 0x201
+                                                        io 0x62 = 0x330
+                                                        irq 0x70 = 9
+                                                end  
+                                                device pnp 2e.8 off end #  GPIO2
+                                                device pnp 2e.9 off end #  GPIO3
+                                                device pnp 2e.a off end #  ACPI
+                                                device pnp 2e.b on #  HW Monitor
+                                                        io 0x60 = 0x290
+                                                        irq 0x70 = 5
+                                                end
 					end
 				end
 				device pci 1.1 on end
-- 
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