From cb2de6869c2f4929db37db7fc4fce0e345b1e799 Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Fri, 13 Mar 2009 17:20:59 +0000 Subject: This patch reverts SuperIO changes that I was too hasty with. Even though the address of the RTC is 0x70, you need to write 0x400 to it. Now the dump from superiotool matches the factory except 0xf0 of the keyboard. When you boot with the factory BIOS that is 0x04, but with coreboot it is not set. It's trivial because it is reverts. Signed-off-by: Myles Watson Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/tyan/s2895/Config.lb | 7 +++---- src/mainboard/tyan/s2895/dsdt.dsl | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-) (limited to 'src/mainboard/tyan/s2895') diff --git a/src/mainboard/tyan/s2895/Config.lb b/src/mainboard/tyan/s2895/Config.lb index 1ac890c00d..78fc5b7378 100644 --- a/src/mainboard/tyan/s2895/Config.lb +++ b/src/mainboard/tyan/s2895/Config.lb @@ -269,7 +269,7 @@ chip northbridge/amd/amdk8/root_complex device pnp 2e.3 on # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 - drq 0x74 = 3 + drq 0x74 = 4 end device pnp 2e.4 on # Com1 io 0x60 = 0x3f8 @@ -286,7 +286,7 @@ chip northbridge/amd/amdk8/root_complex irq 0x72 = 12 end device pnp 2e.8 on # HW Monitor - io 0x60 = 0x290 + io 0x60 = 0x480 chip drivers/generic/generic # LM95221 CPU temp device i2c 2b on end end @@ -295,8 +295,7 @@ chip northbridge/amd/amdk8/root_complex end end device pnp 2e.a on # RT - io 0x60 = 0x90 - irq 0x70 = 8 + io 0x60 = 0x400 end end end diff --git a/src/mainboard/tyan/s2895/dsdt.dsl b/src/mainboard/tyan/s2895/dsdt.dsl index b449064954..597d41e589 100644 --- a/src/mainboard/tyan/s2895/dsdt.dsl +++ b/src/mainboard/tyan/s2895/dsdt.dsl @@ -188,7 +188,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) Method (_CRS, 0, NotSerialized) { Name (TMP, ResourceTemplate () { - FixedIO (0x0090, 0x02) + FixedIO (0x0070, 0x02) IRQNoFlags () {8} }) Return (TMP) -- cgit v1.2.3