From 6d74d76de46e733fa4866f47b58be60feb472f1f Mon Sep 17 00:00:00 2001
From: Yinghai Lu <yinghailu@gmail.com>
Date: Wed, 4 Oct 2006 23:57:49 +0000
Subject: get_bus_cong using sysconf instead

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/tyan/s2895/Options.lb | 43 ++++++++++++++++++++++++-------------
 1 file changed, 28 insertions(+), 15 deletions(-)

(limited to 'src/mainboard/tyan/s2895/Options.lb')

diff --git a/src/mainboard/tyan/s2895/Options.lb b/src/mainboard/tyan/s2895/Options.lb
index cd367ad029..b1ee5367e8 100644
--- a/src/mainboard/tyan/s2895/Options.lb
+++ b/src/mainboard/tyan/s2895/Options.lb
@@ -2,6 +2,8 @@ uses HAVE_MP_TABLE
 uses HAVE_PIRQ_TABLE
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
+uses USE_FAILOVER_IMAGE
+uses HAVE_FAILOVER_BOOT
 uses HAVE_HARD_RESET
 uses IRQ_SLOT_COUNT
 uses HAVE_OPTION_TABLE
@@ -11,6 +13,7 @@ uses CONFIG_LOGICAL_CPUS
 uses CONFIG_IOAPIC
 uses CONFIG_SMP
 uses FALLBACK_SIZE
+uses FAILOVER_SIZE
 uses ROM_SIZE
 uses ROM_SECTION_SIZE
 uses ROM_IMAGE_SIZE
@@ -60,6 +63,8 @@ uses DCACHE_RAM_BASE
 uses DCACHE_RAM_SIZE
 uses CONFIG_USE_INIT
 
+uses SERIAL_CPU_INIT
+
 uses ENABLE_APIC_EXT_ID
 uses APIC_ID_OFFSET
 uses LIFT_BSP_APIC_ID
@@ -69,28 +74,34 @@ uses HT_CHAIN_END_UNITID_BASE
 uses SB_HT_CHAIN_ON_BUS0
 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
 
+uses CONFIG_LB_MEM_TOPK
+
 ## ROM_SIZE is the size of boot ROM that this board will use.
 #512K bytes 
-#default ROM_SIZE=524288
+default ROM_SIZE=524288
 
 #1M bytes
-default ROM_SIZE=1048576
+#default ROM_SIZE=1048576
 
 ##
 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
 ##
 #default FALLBACK_SIZE=131072
-#256K
-default FALLBACK_SIZE=0x40000
+#default FALLBACK_SIZE=0x40000
 
-###
-### Build options
-###
+#FALLBACK: 256K-4K
+default FALLBACK_SIZE=0x3f000
+#FAILOVER: 4K
+default FAILOVER_SIZE=0x01000
+
+#more 1M for pgtbl
+default CONFIG_LB_MEM_TOPK=2048
 
 ##
 ## Build code for the fallback boot
 ##
 default HAVE_FALLBACK_BOOT=1
+default HAVE_FAILOVER_BOOT=1
 
 ##
 ## Build code to reset the motherboard from linuxBIOS
@@ -130,15 +141,14 @@ default CONFIG_MAX_CPUS=4
 default CONFIG_MAX_PHYSICAL_CPUS=2
 default CONFIG_LOGICAL_CPUS=1
 
+default SERIAL_CPU_INIT=0
+
 #CHIP_NAME ?
 #default CONFIG_CHIP_NAME=1
 
 #1G memory hole
 default HW_MEM_HOLE_SIZEK=0x100000
 
-#Opteron K8 1G HT Support
-default K8_HT_FREQ_1G_SUPPORT=1
-
 ##HT Unit ID offset, default is 1, the typical one
 default HT_CHAIN_UNITID_BASE=0x0
 
@@ -151,6 +161,9 @@ default SB_HT_CHAIN_ON_BUS0=2
 ##only offset for SB chain?, default is yes(1)
 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
 
+#Opteron K8 1G HT Support
+default K8_HT_FREQ_1G_SUPPORT=1
+
 #VGA
 default CONFIG_CONSOLE_VGA=1
 default CONFIG_PCI_ROM_RUN=1
@@ -163,7 +176,7 @@ default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
 default CONFIG_USE_INIT=0
 
-default ENABLE_APIC_EXT_ID=1
+default ENABLE_APIC_EXT_ID=0
 default APIC_ID_OFFSET=0x10
 default LIFT_BSP_APIC_ID=0
 
@@ -201,12 +214,12 @@ default HEAP_SIZE=0x4000
 ##
 ## Only use the option table in a normal image
 ##
-default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE )
 
 ##
 ## LinuxBIOS C code runs at this location in RAM
 ##
-default _RAMBASE=0x00004000
+default _RAMBASE=0x00100000
 
 ##
 ## Load the payload from the ROM
@@ -220,8 +233,8 @@ default CONFIG_ROM_STREAM = 1
 ##
 ## The default compiler
 ##
-default CC="$(CROSS_COMPILE)gcc -m32"
-default HOSTCC="gcc"
+default CC="$(CROSS_COMPILE)gcc-4.0.2 -m32"
+default HOSTCC="gcc-4.0.2"
 
 ##
 ## Disable the gdb stub by default
-- 
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