From 6a4e9b547a0e73fb48ee228357820fb3ba85cec2 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Fri, 18 Oct 2013 09:42:55 +0200 Subject: get_bus_conf.c: reindent with indent Change-Id: Ia0c37339aa69b92a1b518fa5e49adc4a7628ae5d Signed-off-by: Paul Menzel Reviewed-on: http://review.coreboot.org/3979 Reviewed-by: Ronald G. Minnich Tested-by: build bot (Jenkins) --- src/mainboard/tyan/s2892/get_bus_conf.c | 196 ++++++++++++++++---------------- 1 file changed, 98 insertions(+), 98 deletions(-) (limited to 'src/mainboard/tyan/s2892') diff --git a/src/mainboard/tyan/s2892/get_bus_conf.c b/src/mainboard/tyan/s2892/get_bus_conf.c index 174632fa44..0ead854448 100644 --- a/src/mainboard/tyan/s2892/get_bus_conf.c +++ b/src/mainboard/tyan/s2892/get_bus_conf.c @@ -12,24 +12,23 @@ // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables //busnum is default - unsigned char bus_ck804_0; //1 - unsigned char bus_ck804_1; //2 - unsigned char bus_ck804_2; //3 - unsigned char bus_ck804_3; //4 - unsigned char bus_ck804_4; //5 - unsigned char bus_ck804_5; //6 - unsigned char bus_8131_0; //7 - unsigned char bus_8131_1; //8 - unsigned char bus_8131_2; //9 - unsigned apicid_ck804; - unsigned apicid_8131_1; - unsigned apicid_8131_2; - -unsigned pci1234x[] = -{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not - //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail - 0x0000ff0, - 0x0000ff0, +unsigned char bus_ck804_0; //1 +unsigned char bus_ck804_1; //2 +unsigned char bus_ck804_2; //3 +unsigned char bus_ck804_3; //4 +unsigned char bus_ck804_4; //5 +unsigned char bus_ck804_5; //6 +unsigned char bus_8131_0; //7 +unsigned char bus_8131_1; //8 +unsigned char bus_8131_2; //9 +unsigned apicid_ck804; +unsigned apicid_8131_1; +unsigned apicid_8131_2; + +unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not + //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail + 0x0000ff0, + 0x0000ff0, // 0x0000ff0, // 0x0000ff0, // 0x0000ff0, @@ -37,8 +36,8 @@ unsigned pci1234x[] = // 0x0000ff0, // 0x0000ff0 }; -unsigned hcdnx[] = -{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most + +unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most 0x20202020, 0x20202020, // 0x20202020, @@ -51,8 +50,6 @@ unsigned hcdnx[] = unsigned sbdn3; - - static unsigned get_bus_conf_done = 0; void get_bus_conf(void) @@ -61,89 +58,92 @@ void get_bus_conf(void) unsigned apicid_base; unsigned sbdn; - device_t dev; - int i; + device_t dev; + int i; - if(get_bus_conf_done==1) return; //do it only once + if (get_bus_conf_done == 1) + return; //do it only once - get_bus_conf_done = 1; + get_bus_conf_done = 1; - sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); - for(i=0;i> 16) & 0xff; - - /* CK804 */ - dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0)); - if (dev) { - bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_ck804_4++; - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09); - - bus_ck804_1 = 2; - bus_ck804_4 = 3; - } - - dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d,0)); - if (dev) { - bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS); - bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_ck804_5++; - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",sbdn + 0x0d); - - bus_ck804_5 = bus_ck804_4+1; - } - - dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0)); - if (dev) { - bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e); - } - - bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff; - /* 8131-1 */ - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0)); - if (dev) { - bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_8131_2++; - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0); - - bus_8131_1 = bus_8131_0+1; - bus_8131_2 = bus_8131_0+2; - } - /* 8131-2 */ - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0)); - if (dev) { - bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0); - - bus_8131_2 = bus_8131_1+1; - } - - + /* CK804 */ + dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0)); + if (dev) { + bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_ck804_4++; + } else { + printk(BIOS_DEBUG, + "ERROR - could not find PCI 1:%02x.0, using defaults\n", + sbdn + 0x09); + + bus_ck804_1 = 2; + bus_ck804_4 = 3; + } + + dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0)); + if (dev) { + bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_ck804_5++; + } else { + printk(BIOS_DEBUG, + "ERROR - could not find PCI 1:%02x.0, using defaults\n", + sbdn + 0x0d); + + bus_ck804_5 = bus_ck804_4 + 1; + } + + dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0)); + if (dev) { + bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS); + } else { + printk(BIOS_DEBUG, + "ERROR - could not find PCI 1:%02x.0, using defaults\n", + sbdn + 0x0e); + } + + bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff; + /* 8131-1 */ + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0)); + if (dev) { + bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); + bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_8131_2++; + } else { + printk(BIOS_DEBUG, + "ERROR - could not find PCI %02x:01.0, using defaults\n", + bus_8131_0); + + bus_8131_1 = bus_8131_0 + 1; + bus_8131_2 = bus_8131_0 + 2; + } + /* 8131-2 */ + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0)); + if (dev) { + bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); + } else { + printk(BIOS_DEBUG, + "ERROR - could not find PCI %02x:02.0, using defaults\n", + bus_8131_0); + + bus_8131_2 = bus_8131_1 + 1; + } /*I/O APICs: APIC ID Version State Address*/ #if CONFIG_LOGICAL_CPUS @@ -151,7 +151,7 @@ void get_bus_conf(void) #else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; #endif - apicid_ck804 = apicid_base+0; - apicid_8131_1 = apicid_base+1; - apicid_8131_2 = apicid_base+2; + apicid_ck804 = apicid_base + 0; + apicid_8131_1 = apicid_base + 1; + apicid_8131_2 = apicid_base + 2; } -- cgit v1.2.3