From 3e914d372661ba68ca92d476708bd68af2593b10 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Wed, 6 Apr 2022 22:25:50 +0200
Subject: arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE

Prepare platforms for linking romstage code in the bootblock.

Change-Id: Ic20799b4d6e3f62cd05791a2bd275000a12cc83c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63420
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
---
 src/mainboard/ti/beaglebone/romstage.c | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/mainboard/ti')

diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c
index 4d43be6023..da6a182fa5 100644
--- a/src/mainboard/ti/beaglebone/romstage.c
+++ b/src/mainboard/ti/beaglebone/romstage.c
@@ -3,6 +3,7 @@
 #include <program_loading.h>
 #include <console/console.h>
 #include <cbmem.h>
+#include <romstage_common.h>
 
 #include <soc/ti/am335x/sdram.h>
 #include "ddr3.h"
@@ -48,7 +49,11 @@ void main(void)
 {
 	console_init();
 	printk(BIOS_INFO, "Hello from romstage.\n");
+	romstage_main();
+}
 
+void __noreturn romstage_main(void)
+{
 	config_ddr(400, &ioregs_bonelt, &ddr3_beagleblack_data, &ddr3_beagleblack_cmd_ctrl_data,
 		   &ddr3_beagleblack_emif_reg_data, 0);
 
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