From 0dcdb217cf4fe1d2e2055994930eda618e9fe892 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Fri, 13 Aug 2021 08:31:52 +0200 Subject: soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since all mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, make it the default by changing its enum value to 0 and remove its configuration from all related devicetrees. If `common_soc_config.chipset_lockdown` is not configured with something else in the devicetree, then `CHIPSET_LOCKDOWN_COREBOOT` is used. Also, add a release note for the upcoming 4.15 release. Change-Id: I369f01d3da2e901e2fb57f2c83bd07380f3946a6 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/56967 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Tim Crawford Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner --- src/mainboard/system76/gaze15/devicetree.cb | 1 - src/mainboard/system76/lemp9/devicetree.cb | 1 - src/mainboard/system76/oryp5/devicetree.cb | 1 - src/mainboard/system76/oryp6/devicetree.cb | 1 - src/mainboard/system76/whl-u/devicetree.cb | 1 - 5 files changed, 5 deletions(-) (limited to 'src/mainboard/system76') diff --git a/src/mainboard/system76/gaze15/devicetree.cb b/src/mainboard/system76/gaze15/devicetree.cb index 5165f61a66..1aec60f6d0 100644 --- a/src/mainboard/system76/gaze15/devicetree.cb +++ b/src/mainboard/system76/gaze15/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/cannonlake register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, // Touchpad I2C bus .i2c[0] = { .speed = I2C_SPEED_FAST, diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb index 80f0ef4b9f..536aa7da16 100644 --- a/src/mainboard/system76/lemp9/devicetree.cb +++ b/src/mainboard/system76/lemp9/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/cannonlake register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, /* Touchpad */ .i2c[0] = { .speed = I2C_SPEED_FAST, diff --git a/src/mainboard/system76/oryp5/devicetree.cb b/src/mainboard/system76/oryp5/devicetree.cb index e8463ca7ca..09c08842c3 100644 --- a/src/mainboard/system76/oryp5/devicetree.cb +++ b/src/mainboard/system76/oryp5/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/cannonlake register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, // Touchpad I2C bus .i2c[0] = { .speed = I2C_SPEED_FAST, diff --git a/src/mainboard/system76/oryp6/devicetree.cb b/src/mainboard/system76/oryp6/devicetree.cb index 5d9c73b05c..24d894edbd 100644 --- a/src/mainboard/system76/oryp6/devicetree.cb +++ b/src/mainboard/system76/oryp6/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/cannonlake register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, // Touchpad I2C bus .i2c[0] = { .speed = I2C_SPEED_FAST, diff --git a/src/mainboard/system76/whl-u/devicetree.cb b/src/mainboard/system76/whl-u/devicetree.cb index ade42a435a..da0f0b72ef 100644 --- a/src/mainboard/system76/whl-u/devicetree.cb +++ b/src/mainboard/system76/whl-u/devicetree.cb @@ -1,7 +1,6 @@ chip soc/intel/cannonlake # Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 80, -- cgit v1.2.3