From 9b43afde3922e7c4c58dbed85df2a9ea26e11bdf Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 8 Apr 2010 15:09:53 +0000 Subject: Clean up fidvid files using indent. Remove some special print statements. In general, make them easier to compare. Signed-off-by: Myles Watson Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/supermicro/h8dme/romstage.c | 6 +++--- src/mainboard/supermicro/h8dmr/romstage.c | 6 +++--- src/mainboard/supermicro/h8dmr_fam10/romstage.c | 6 +++--- src/mainboard/supermicro/h8qme_fam10/romstage.c | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src/mainboard/supermicro') diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 7f668f4c15..964f4dab67 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -27,9 +27,9 @@ #endif // used by init_cpus and fidvid -#define K8_SET_FIDVID 1 +#define SET_FIDVID 1 //if we want to wait for core1 done before DQS training, set it to 0 -#define K8_SET_FIDVID_CORE0_ONLY 1 +#define SET_FIDVID_CORE0_ONLY 1 #if CONFIG_K8_REV_F_SUPPORT == 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 @@ -295,7 +295,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* it will set up chains and store link pair for optimization later */ ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn -#if K8_SET_FIDVID == 1 +#if SET_FIDVID == 1 { msr_t msr; diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 7245b37fb2..940dea3d82 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -30,9 +30,9 @@ #endif //used by init_cpus and fidvid -#define K8_SET_FIDVID 1 +#define SET_FIDVID 1 //if we want to wait for core1 done before DQS training, set it to 0 -#define K8_SET_FIDVID_CORE0_ONLY 1 +#define SET_FIDVID_CORE0_ONLY 1 #if CONFIG_K8_REV_F_SUPPORT == 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 @@ -223,7 +223,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* it will set up chains and store link pair for optimization later */ ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn -#if K8_SET_FIDVID == 1 +#if SET_FIDVID == 1 { msr_t msr; diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 095c4b1f1f..fb91d62dd1 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -30,8 +30,8 @@ #define SET_NB_CFG_54 1 #endif -#define FAM10_SET_FIDVID 1 -#define FAM10_SET_FIDVID_CORE_RANGE 0 +#define SET_FIDVID 1 +#define SET_FIDVID_CORE_RANGE 0 #include #include @@ -235,7 +235,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); -#if FAM10_SET_FIDVID == 1 +#if SET_FIDVID == 1 msr = rdmsr(0xc0010071); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 3c4dedefaf..fc32549eb5 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -30,8 +30,8 @@ #define SET_NB_CFG_54 1 #endif -#define FAM10_SET_FIDVID 1 -#define FAM10_SET_FIDVID_CORE_RANGE 0 +#define SET_FIDVID 1 +#define SET_FIDVID_CORE_RANGE 0 #include #include @@ -280,7 +280,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); -#if FAM10_SET_FIDVID == 1 +#if SET_FIDVID == 1 msr = rdmsr(0xc0010071); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); -- cgit v1.2.3