From 691d58f9996d2ff3820b2c08646e98f16bbde2ee Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 11 Aug 2021 13:42:40 +0200 Subject: nb/intel/sandybridge: Add a chipset devicetree This only moves CPU configuration to a common place. Other PCI devices can be done in follow-ups. Change-Id: I9c5b6f25b779e28b6719cf70455ff0f1a916ad87 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/56912 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/supermicro/x9scl/devicetree.cb | 9 --------- 1 file changed, 9 deletions(-) (limited to 'src/mainboard/supermicro/x9scl') diff --git a/src/mainboard/supermicro/x9scl/devicetree.cb b/src/mainboard/supermicro/x9scl/devicetree.cb index 284d8f3204..b0f3534033 100644 --- a/src/mainboard/supermicro/x9scl/devicetree.cb +++ b/src/mainboard/supermicro/x9scl/devicetree.cb @@ -1,13 +1,4 @@ chip northbridge/intel/sandybridge - device cpu_cluster 0 on - chip cpu/intel/model_206ax # FIXME: check all registers - register "acpi_c1" = "1" - register "acpi_c2" = "3" - register "acpi_c3" = "5" - device lapic 0 on end - device lapic 0xacac off end - end - end device domain 0 on subsystemid 0x15d9 0x0624 inherit device pci 00.0 on end # Host bridge -- cgit v1.2.3