From 3e4f7a39f8cbdfc7cd097b5c57c43f52d9b0fb4c Mon Sep 17 00:00:00 2001 From: "Jonathan A. Kollasch" Date: Fri, 10 Jan 2020 13:23:02 -0600 Subject: mainboard: add Supermicro X9SCL/X9SCM Boots to Linux. Works: - CPU (Core i3-2120 tested) - Memory (one 1GB 1Rx8 PC3-10600E module tested) - Slots 4, 6, 7 To fix/improve: - SuperIO hardware monitor setup for PECI and fan control - SuperIO ASL in DSDT (e.g. UART Devices) - PEG PCIe lanes (should show x8 max width instead of x16 on 0:1.0 for Slot 7) Untested: - IPMI where BMC is fully implemented (X9SC[LM](+)-F variants) - GbE on X9SCL+-F (where there are two 82574L instead of one) - Slot 5 (x4 on 0:06.0) (only applicable to X9SCM variants) Signed-off-by: Jonathan A. Kollasch Change-Id: I985db89d67de21bbafbdc34d7044496434a6eb17 Depends-On: I5b7599746195cfa996a48320404a8dbe6820483a, I1206746332c9939a78b67e7b48d3098bdef8a2ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/38346 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/supermicro/x9scl/devicetree.cb | 127 +++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 src/mainboard/supermicro/x9scl/devicetree.cb (limited to 'src/mainboard/supermicro/x9scl/devicetree.cb') diff --git a/src/mainboard/supermicro/x9scl/devicetree.cb b/src/mainboard/supermicro/x9scl/devicetree.cb new file mode 100644 index 0000000000..9236f6f3da --- /dev/null +++ b/src/mainboard/supermicro/x9scl/devicetree.cb @@ -0,0 +1,127 @@ +chip northbridge/intel/sandybridge + device cpu_cluster 0 on + chip cpu/intel/model_206ax # FIXME: check all registers + register "c1_acpower" = "1" + register "c1_battery" = "1" + register "c2_acpower" = "3" + register "c2_battery" = "3" + register "c3_acpower" = "5" + register "c3_battery" = "5" + device lapic 0x0 on end + device lapic 0xacac off end + end + end + device domain 0 on + subsystemid 0x15d9 0x0624 inherit + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PEG + device pci 01.1 on end # PEG + device pci 02.0 off end # iGPU + device pci 06.0 on end # PEG + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "c2_latency" = "0x0065" + register "gen1_dec" = "0x00fc0a01" # NCT6776 SuperIO (0x0a00-0aff) + register "gen2_dec" = "0x00fc1641" # WPCM450 SuperIO (0x1600-16ff) + register "gen3_dec" = "0x00040ca1" # IPMI KCS (0x0ca0-0ca3) + register "gen4_dec" = "0x001c03e1" # 3rd UART (0x03e0-03ff) + register "pcie_port_coalesce" = "1" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x3f" + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + device pci 16.0 off end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 on # Intel Gigabit Ethernet (not for X9SCL+-F) + subsystemid 0x15d9 0x1502 + end + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 off end # High Definition Audio + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 off end # PCIe Port #2 + device pci 1c.2 off end # PCIe Port #3 + device pci 1c.3 off end # PCIe Port #4 + device pci 1c.4 on # PCIe Port #5 + device pci 00.0 on end # primary 574 GigE + end + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 on # PCIe Port #7 + device pci 00.0 on end # secondary 574 GigE on X9SCL+-F + end + device pci 1c.7 off end # PCIe Port #8 + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1e.0 on # PCI bridge + device pci 03.0 on end # Matrox G200e in BMC + end + device pci 1f.0 on # LPC bridge + chip superio/nuvoton/nct6776 + device pnp 2e.0 off end # Floppy + device pnp 2e.1 off end # Parallel port + device pnp 2e.2 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 on # COM2, IR + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x060 + io 0x62 = 0x064 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off end # CIR + device pnp 2e.7 off end # GPIO6 + device pnp 2e.107 off end # GPIO7 + device pnp 2e.207 off end # GPIO8 + device pnp 2e.307 off end # GPIO9 + device pnp 2e.8 off end # WDT + device pnp 2e.108 on end # GPIO0 + device pnp 2e.208 off end # GPIOA + device pnp 2e.308 on # GPIOBASE + io 0x60 = 0xa80 + end + device pnp 2e.109 off end # GPIO1 + device pnp 2e.209 on # GPIO2 + end + device pnp 2e.309 on # GPIO3 + end + device pnp 2e.409 off end # GPIO4 + device pnp 2e.509 off end # GPIO5 + device pnp 2e.609 off end # GPIO6 + device pnp 2e.709 off end # GPIO7 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HWM, front panel LED + io 0x60 = 0xa30 + io 0x62 = 0 + end + device pnp 2e.d off end # VID + device pnp 2e.e off end # CIR WAKE-UP + device pnp 2e.f off end # GPIO + device pnp 2e.14 off end # SVID + device pnp 2e.16 off end # Deep sleep + device pnp 2e.17 off end # GPIOA + end + chip drivers/ipmi + register "wait_for_bmc" = "1" + register "bmc_boot_timeout" = "60" + device pnp ca2.0 off end # IPMI KCS + end + chip superio/nuvoton/wpcm450 + device pnp 164e.2 on + io 0x60 = 0x03e8 + irq 0x70 = 10 + end + device pnp 164e.3 off end + device pnp 164e.6 off end + end + end + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal + end + end +end -- cgit v1.2.3