From dcddc53fde2d559beef998d3c17e9b7a227e3665 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 23 Jun 2024 03:39:24 +0200 Subject: skl mainboards/dt: Move genx_dec settings into LPC device scope MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Iecb4851bedb7c9ed7793763d80acbcbb068e8832 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83172 Reviewed-by: Michael Niewöhner Reviewed-by: Jonathon Hall Reviewed-by: Erik van den Bogaert Reviewed-by: Eric Lai Reviewed-by: Marvin Evers Tested-by: build bot (Jenkins) --- .../x11-lga1151-series/variants/x11ssh-tf/overridetree.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb') diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb index 035811f9bf..97f995d7cd 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb @@ -8,9 +8,6 @@ chip soc/intel/skylake register "gpe0_dw1" = "GPP_D" register "gpe0_dw2" = "GPP_E" - register "gen1_dec" = "0x007c0a01" # Super IO SWC - register "gen2_dec" = "0x000c0ca1" # IPMI KCS - # FIXME: find out why FSP crashes without this register "PchHdaVcType" = "Vc1" @@ -67,6 +64,9 @@ chip soc/intel/skylake smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2 2280" "SlotDataBusWidth4X" end device ref lpc_espi on + register "gen1_dec" = "0x007c0a01" # Super IO SWC + register "gen2_dec" = "0x000c0ca1" # IPMI KCS + chip drivers/ipmi use pch_gpio as gpio_dev register "post_complete_gpio" = "GPP_B20" -- cgit v1.2.3