From 8ab989e31561cea0c6af5d5e242dd2be97bc73b4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 30 Jul 2016 17:46:17 +0200 Subject: src/mainboard: Capitalize ROM, RAM, CPU and APIC Change-Id: Ia1f24d328a065a54975adde067df36c5751bff2d Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/15987 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/supermicro/h8scm/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/supermicro/h8scm/romstage.c') diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c index 071f2477db..fecb91a691 100644 --- a/src/mainboard/supermicro/h8scm/romstage.c +++ b/src/mainboard/supermicro/h8scm/romstage.c @@ -97,7 +97,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x42); post_code(0x50); - printk(BIOS_DEBUG, "Disabling cache as ram "); + printk(BIOS_DEBUG, "Disabling cache as RAM "); disable_cache_as_ram(); printk(BIOS_DEBUG, "done\n"); -- cgit v1.2.3