From 0c797f1c28cd16c64482b2cea554e89baaa31445 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 21 Jul 2014 19:35:16 +0300 Subject: AGESA: Drop offset on PCI device enumeration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Integrated PCI devices in southbridge silicon have static BDFs, no need to have variables to store the parent bus or an offset with constant zero. Change-Id: I37d3794d36b5e5775da9215574ddc199696646d0 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6333 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Patrick Georgi --- src/mainboard/supermicro/h8scm/irq_tables.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'src/mainboard/supermicro/h8scm/irq_tables.c') diff --git a/src/mainboard/supermicro/h8scm/irq_tables.c b/src/mainboard/supermicro/h8scm/irq_tables.c index 9770e6d848..8f727563a7 100644 --- a/src/mainboard/supermicro/h8scm/irq_tables.c +++ b/src/mainboard/supermicro/h8scm/irq_tables.c @@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->slot = slot; pirq_info->rfu = rfu; } -extern u8 bus_sp5100[2]; -extern unsigned long sbdn_sp5100; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - pirq->rtr_bus = bus_sp5100[0]; - pirq->rtr_devfn = ((sbdn_sp5100 + 0x14) << 3) | 4; + pirq->rtr_bus = 0; + pirq->rtr_devfn = PCI_DEVFN(0x14, 4); pirq->exclusive_irqs = 0; @@ -87,7 +85,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) slot_num = 0; /* pci bridge */ - write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4, + write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; -- cgit v1.2.3