From 7748ee5ee188bf6b3846501b32a9ae82ccb8e853 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 5 Feb 2015 15:48:38 +0200 Subject: AMD K8 fam10: Refactor Kconfig SB_HT_CHAIN_ON_BUS0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If SB_HT_CHAIN_ON_BUS0 is selected, HyperTransport chain for System Bus is the first to scan and it will be assigned with bus number 0. If HT_CHAIN_DISTRIBUTE is selected, each link will reserve a fixed range of bus numbers instead of assigning consecutive numbers across all the links. All fam10 have SB_HT_CHAIN_ON_BUS0 selected under northbridge. Follow-up can easily drop this if we find this is dictated by architecture. Change-Id: I8deddcb4c3fd679b6b27e2879d9dba3895c4dd6f Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8366 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Timothy Pearson --- src/mainboard/supermicro/h8qme_fam10/Kconfig | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/mainboard/supermicro/h8qme_fam10') diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig index 5b195bb26f..27a74bbf51 100644 --- a/src/mainboard/supermicro/h8qme_fam10/Kconfig +++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig @@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDFAM10 select SOUTHBRIDGE_AMD_AMD8132 select SOUTHBRIDGE_NVIDIA_MCP55 + select HT_CHAIN_DISTRIBUTE select SUPERIO_WINBOND_W83627HF select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE @@ -53,10 +54,6 @@ config HT_CHAIN_UNITID_BASE hex default 0x1 -config SB_HT_CHAIN_ON_BUS0 - int - default 2 - config IRQ_SLOT_COUNT int default 11 -- cgit v1.2.3