From 5fa4cb6d32b469ef8312de0c12ec648c085b9a1f Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 29 Jul 2015 23:54:38 -0700 Subject: cpu/amd: Fix cbtypes.h to match UINTN convention There are some inconsistencies in AMDs APIs between the coreboot code and the vendorcode code. Unify the API. UINTN maps to uintptr_t in UEFI land. Do the same here. Also switch the other UEFI types to map to fixed size types. Change-Id: Ib46893c7cd5368eae43e9cda30eed7398867ac5b Signed-off-by: Stefan Reinauer Signed-off-by: Scott Duplichan Reviewed-on: http://review.coreboot.org/10601 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/supermicro/h8qgi/rd890_cfg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/supermicro/h8qgi') diff --git a/src/mainboard/supermicro/h8qgi/rd890_cfg.c b/src/mainboard/supermicro/h8qgi/rd890_cfg.c index 147d32bc31..a337714c62 100644 --- a/src/mainboard/supermicro/h8qgi/rd890_cfg.c +++ b/src/mainboard/supermicro/h8qgi/rd890_cfg.c @@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */ //pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS; pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS; - pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry; + pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry; /* * PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform. -- cgit v1.2.3