From d23ee5de2233d2f200dc15bf4a7669599c2b2014 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 11 Aug 2016 22:45:55 +0200 Subject: mainboard: Clean up boot_option/reboot_bits in cmos.layout Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector code) the reboot counter stored in `reboot_bits` isn't reset on a reboot with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR enabled, later stages (e.g. payload, OS) have to clear the counter too, when they want to switch to normal boot. So change the bits to (h)ex instead of (r)eserved. To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also remove all occurences of the obsolete `last_boot` bit that have sneaked in again since 24391321 (mainboard: Remove last_boot NVRAM option). Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/16157 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson Reviewed-by: York Yang Reviewed-by: Paul Menzel --- src/mainboard/supermicro/h8dmr_fam10/cmos.layout | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/supermicro/h8dmr_fam10') diff --git a/src/mainboard/supermicro/h8dmr_fam10/cmos.layout b/src/mainboard/supermicro/h8dmr_fam10/cmos.layout index 3c0a4ed49d..fe0ff4e95b 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/cmos.layout +++ b/src/mainboard/supermicro/h8dmr_fam10/cmos.layout @@ -20,7 +20,7 @@ entries 0 384 r 0 reserved_memory 384 1 e 4 boot_option -388 4 r 0 reboot_bits +388 4 h 0 reboot_counter 393 3 e 5 baud_rate 396 5 e 10 ecc_scrub_rate 401 1 e 1 interleave_chip_selects -- cgit v1.2.3