From f7f7b3bbf6827494985afae5f10312e63d6a8049 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 29 Mar 2023 15:34:07 +0200 Subject: soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP Add the 28W TDP version of the ADL-P with MCHID 0x4629. Verified that all 28W SoCs have the same PL1/PL2 defined in Intel document #655258 "12th Generation Intel Core Processors Datasheet, Volume 1 of 2". Fixes the error seen in coreboot log: [ERROR] unknown SA ID: 0x4629, skipped power Limit Configuration Change-Id: Iad676f083dfd1cceb4df9435d467dc0f31a63f80 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/74116 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan Reviewed-by: Sean Rhodes Reviewed-by: Maximilian Brune --- src/mainboard/starlabs/starbook/variants/adl/devtree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/starlabs') diff --git a/src/mainboard/starlabs/starbook/variants/adl/devtree.c b/src/mainboard/starlabs/starbook/variants/adl/devtree.c index 0b764fdda8..27ab6c90f2 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/devtree.c +++ b/src/mainboard/starlabs/starbook/variants/adl/devtree.c @@ -16,7 +16,7 @@ void devtree_update(void) common_config = chip_get_common_soc_structure(); struct soc_power_limits_config *soc_conf_10core = - &cfg->power_limits_config[ADL_P_282_482_28W_CORE]; + &cfg->power_limits_config[ADL_P_282_442_482_28W_CORE]; struct soc_power_limits_config *soc_conf_12core = &cfg->power_limits_config[ADL_P_682_28W_CORE]; -- cgit v1.2.3