From b02c90d146f4929acdee0f28e4c0ddd545ffdb04 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Thu, 16 Jun 2022 22:44:41 +0100 Subject: mb/starlabs/lite/glkr: Correct the daughterboard USB 3.0 port number The daughterboard USB 3.0 was set to port 3, which is incorrect. This patch corrects that to port 4. This fixes an issue where USB 3.0 devices are not detected when plugged in to this port. Signed-off-by: Sean Rhodes Change-Id: I50f86dee1b512d0dd20d07e3ee17ebfa5e537bc9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65186 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/starlabs/lite/variants/glkr/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/starlabs') diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb index 057fc2b51a..aad20ea8f6 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb @@ -100,7 +100,7 @@ chip soc/intel/apollolake # Daughterboard SD Card register "usb2_port[5]" = "PORT_EN(OC_SKIP)" - register "usb3_port[3]" = "PORT_EN(OC1)" + register "usb3_port[4]" = "PORT_EN(OC1)" # Bluetooth register "usb2_port[6]" = "PORT_EN(OC_SKIP)" -- cgit v1.2.3