From f023270a6883b52a408281e3840add0b98435399 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Wed, 26 Jan 2022 11:53:00 +0100 Subject: mb/siemens/{mc_apl1,...,mc_apl6}: Disable SATA ALPM support Aggressive Link Power Management are no longer supported on these mainboards and must therefore be disabled. This feature can have a negative impact on the real-time behavior of the systems. TEST: - Boot into system software on mc_apl1 Change-Id: I8b08381743018790a20273ea1f61e5b0a56e6015 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/61402 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb | 4 +++- src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb | 4 +++- src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb | 4 +++- src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb | 4 +++- src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb | 4 +++- src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb | 4 +++- 6 files changed, 18 insertions(+), 6 deletions(-) (limited to 'src/mainboard/siemens') diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb index 20d44bb100..0d1cc46c11 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb @@ -72,7 +72,9 @@ chip soc/intel/apollolake device pci 0e.0 on end # - Audio device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "DisableSataSalpSupport" = "1" + end device pci 13.0 on # - RP 2 - PCIe A 0 - MACPHY register "pcie_rp_clkreq_pin[2]" = "0" register "pcie_rp_hotplug_enable[2]" = "0" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 1749636157..74402566cf 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -70,7 +70,9 @@ chip soc/intel/apollolake device pci 0e.0 on end # - Audio device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "DisableSataSalpSupport" = "1" + end device pci 13.0 on # - RP 2 - PCIe A 0 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" register "pcie_rp_hotplug_enable[2]" = "0" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb index 45cfd850f8..449230f44b 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb @@ -67,7 +67,9 @@ chip soc/intel/apollolake device pci 0e.0 on end # - Audio device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "DisableSataSalpSupport" = "1" + end device pci 13.0 on # - RP 2 - PCIe A 0 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" register "pcie_rp_hotplug_enable[2]" = "0" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb index 6f37848238..58791f3f10 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb @@ -51,7 +51,9 @@ chip soc/intel/apollolake device pci 0e.0 on end # - Audio device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "DisableSataSalpSupport" = "1" + end device pci 13.0 on # - RP 2 - PCIe A 0 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" register "pcie_rp_hotplug_enable[2]" = "0" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index 2500e08670..c4c2e3df9a 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -70,7 +70,9 @@ chip soc/intel/apollolake device pci 0e.0 on end # - Audio device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "DisableSataSalpSupport" = "1" + end device pci 13.0 on # - RP 2 - PCIe A 0 register "pcie_rp_clkreq_pin[2]" = "0" register "pcie_rp_hotplug_enable[2]" = "0" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index e058fdeb64..f75dc1cd86 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -41,7 +41,9 @@ chip soc/intel/apollolake device pci 0e.0 on end # - Audio device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH - device pci 12.0 on end # - SATA + device pci 12.0 on # - SATA + register "DisableSataSalpSupport" = "1" + end device pci 13.0 on # - RP 2 - PCIe A 0 register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" register "pcie_rp_hotplug_enable[2]" = "0" -- cgit v1.2.3