From 7ab5dcd5c85b20804220af33fab35a550a762d87 Mon Sep 17 00:00:00 2001
From: Mario Scheithauer <mario.scheithauer@siemens.com>
Date: Mon, 6 Nov 2017 17:28:40 +0100
Subject: siemens/mc_apl1: Select CONFIG_NC_FPGA_NOTIFY_CB_READY

For internal measurements this mainboard needs a marking inside the NC
FPGA when coreboot is ready and payload has been loaded.

Change-Id: I37908b21e2a077dec7fa99b0db6d1fd9b6878341
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/22356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/mainboard/siemens/mc_apl1/Kconfig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/mainboard/siemens')

diff --git a/src/mainboard/siemens/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/Kconfig
index bcdbb4f4bc..ae86894b68 100644
--- a/src/mainboard/siemens/mc_apl1/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/Kconfig
@@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select DRIVERS_I2C_RX6110SA
 	select DRIVERS_UART_8250IO
 	select APL_SKIP_SET_POWER_LIMITS
+	select NC_FPGA_NOTIFY_CB_READY
 
 config MAINBOARD_DIR
 	string
-- 
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