From 142b52cd322ff69afe974f90a446f62b193d120c Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 10 Dec 2013 07:33:36 +0200 Subject: AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ib3a69e3364418426438f88ba14e5cf744e2414fa Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/4524 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Bruce Griffith Reviewed-by: Paul Menzel --- src/mainboard/siemens/sitemp_g1p1/romstage.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/siemens') diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index dc82585dbd..cdab764a55 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -76,7 +76,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" #include "northbridge/amd/amdk8/early_ht.c" -- cgit v1.2.3