From 0c6dc828f649692f4fdb418078c3da6824582658 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 16 May 2022 16:34:21 +0200 Subject: mainboard/**/devicetree.cb: Fix typo repalcement ---> replacement Change-Id: I486170e89f75fa7c01c7322bb8db783fd4f61931 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/64404 Reviewed-by: Paul Menzel Reviewed-by: Lean Sheng Tan Reviewed-by: Arthur Heymans Reviewed-by: Mario Scheithauer Tested-by: build bot (Jenkins) --- src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb | 2 +- src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/siemens') diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb index 9bb8d8f328..69277a5b10 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb @@ -38,7 +38,7 @@ chip soc/intel/elkhartlake register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Port is not used register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Port is not used - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" # PCIe root ports related UPDs diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 72e4f60cd3..9883fd92e4 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -38,7 +38,7 @@ chip soc/intel/elkhartlake register "usb3_ports[2]" = "USB3_PORT_EMPTY" # UNUSED register "usb3_ports[3]" = "USB3_PORT_EMPTY" # UNUSED - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" # PCIe root ports related UPDs -- cgit v1.2.3