From 8c3cf9eacee7c55c800f423059186709d923854e Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Mon, 27 May 2024 11:09:49 +0200 Subject: mb/siemens/mc_ehl5: Remove DDI settings from devicetree Since this mainboard no longer uses the FSP GOP driver, the DDI port settings are no longer necessary. The GOP driver was used in the initial phase of development where we used Tianocore as payload for some test cases. Finally, this mainboard uses a self-made Linux payload, which does the graphic initialization. BUG=none TEST=Boot into Linux and check if graphic works correctly Change-Id: Ie9e135fbc2627546d6ef95d7d5ff3e9a9222b5d2 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/82663 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh Reviewed-by: Uwe Poeche Reviewed-by: Felix Singer --- src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/mainboard/siemens/mc_ehl/variants') diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb index 43697beab8..8fe9b93dd1 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb @@ -103,9 +103,6 @@ chip soc/intel/elkhartlake register "pse_tsn_phy_irq_edge[0]" = "RISING_EDGE" register "pse_tsn_phy_irq_edge[1]" = "RISING_EDGE" - register "DdiPortAHpd" = "1" - register "DdiPortADdc" = "1" - register "common_soc_config" = "{ .i2c[1] = { .speed = I2C_SPEED_STANDARD, -- cgit v1.2.3