From f729cd0b40719e41bc6d337b179b1a36f775b00e Mon Sep 17 00:00:00 2001 From: Julien Viard de Galbert Date: Thu, 29 Mar 2018 11:31:17 +0200 Subject: mb/scaleway/tagada: Update gpio configuration to use intelblock Update the gpio configuration structure to the intelblock format. The resulting configuration is functionally similar (even if some bits are not identical). Change-Id: Ide515424c6e1b0cb560b52a7f12909f23fd41e06 Signed-off-by: Julien Viard de Galbert Reviewed-on: https://review.coreboot.org/25424 Reviewed-by: Philipp Deppenwiese Tested-by: build bot (Jenkins) --- src/mainboard/scaleway/tagada/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/scaleway/tagada/romstage.c') diff --git a/src/mainboard/scaleway/tagada/romstage.c b/src/mainboard/scaleway/tagada/romstage.c index 630d355785..c29ff9dff7 100644 --- a/src/mainboard/scaleway/tagada/romstage.c +++ b/src/mainboard/scaleway/tagada/romstage.c @@ -31,7 +31,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd); void mainboard_config_gpios(void) { size_t num; - const struct dnv_pad_config *table; + const struct pad_config *table; printk(BIOS_SPEW, "Board Serial: %s.\n", bmcinfo_serial()); /* Configure pads prior to SiliconInit() in case there's any @@ -47,7 +47,7 @@ void mainboard_config_gpios(void) printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n", (uint32_t)table, (uint32_t)num); - gpio_configure_dnv_pads(table, num); + gpio_configure_pads(table, num); } void mainboard_memory_init_params(FSPM_UPD *mupd) -- cgit v1.2.3