From 4b73fa97ce98adda75e889ddbb759022e6cb11b2 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Fri, 8 Jun 2018 19:00:44 +0200 Subject: mainboard: Get rid of device_t Use of device_t has been abandoned in ramstage. Use pci_devfn_t or pnp_devfn_t instead of device_t in romstage. Change-Id: Ie0ae3972eacc97ae154dad4fafd171aa1f38683a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/26984 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/samsung/lumpy/chromeos.c | 8 ++++---- src/mainboard/samsung/stumpy/chromeos.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'src/mainboard/samsung') diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index a287c74538..0f672b6e5f 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -40,7 +40,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1); u8 lid = ec_read(0x83); @@ -91,7 +91,7 @@ int get_write_protect_state(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; @@ -103,7 +103,7 @@ int get_developer_mode_switch(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_DEV_MODE) & 1; @@ -115,7 +115,7 @@ int get_recovery_mode_switch(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index 01d81d73c5..9c3499599c 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -37,7 +37,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1); gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio)); @@ -88,7 +88,7 @@ int get_write_protect_state(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; @@ -100,7 +100,7 @@ int get_developer_mode_switch(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_DEV_MODE) & 1; @@ -112,7 +112,7 @@ int get_recovery_mode_switch(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; -- cgit v1.2.3