From a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 14 Aug 2014 08:35:11 -0500 Subject: intel/cpu: rename car.h to romstage.h This header has nothing to do with cache-as-ram. Therefore, 'car' is the wrong term to use. It is about providing a prototype for *romstage*. Change-Id: Ibc5bc6f3c38e74d6337c12f246846853ceae4743 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/6661 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/roda/rk886ex/romstage.c | 2 +- src/mainboard/roda/rk9/romstage.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/roda') diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index a4f55a8bec..7cc1a1d8b1 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -251,7 +251,7 @@ static void init_artec_dongle(void) outb(0xf4, 0x88); } -#include +#include void main(unsigned long bist) { u32 reg32; diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index 01389368a1..405d75e848 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -120,7 +120,7 @@ static void default_superio_gpio_setup(void) outb(0x10, 0x600 + 0xb + 4); /* GP40 - GP47 */ } -#include +#include void main(unsigned long bist) { sysinfo_t sysinfo; -- cgit v1.2.3