From 4513020064cc4765e723f6f3cc2b8a45a0dc6545 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 4 Jan 2019 14:23:54 +0100 Subject: cpu/intel: Use the common code to initialize the romstage timestamps MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The initial timestamps are now pushed on the stack when entering the romstage C code. Tested on Asus P5QC. Change-Id: I88e972caafff5c53d8e68e85415f920c7341b92d Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/30670 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/roda/rk9/romstage.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/mainboard/roda/rk9') diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index 1bcfd622f0..b88671c705 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -30,7 +30,6 @@ #include #include #include -#include #define LPC_DEV PCI_DEV(0, 0x1f, 0) #define SERIAL_DEV PNP_DEV(0x2e, LPC47N227_SP1) @@ -107,7 +106,6 @@ static void default_superio_gpio_setup(void) /* Exit configuration state. */ pnp_exit_conf_state(sio); - /* Enable decoding of 0x600-0x60f through lpc. */ pci_write_config32(LPC_DEV, D31F0_GEN1_DEC, 0x000c0601); @@ -123,9 +121,6 @@ void mainboard_romstage_entry(unsigned long bist) int cbmem_initted; u16 reg16; - timestamp_init(get_initial_timestamp()); - timestamp_add_now(TS_START_ROMSTAGE); - /* basic northbridge setup, including MMCONF BAR */ gm45_early_init(); -- cgit v1.2.3