From 0dd5e4395e805e3d54b31f3eaf8b432af5bad5e2 Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Tue, 29 Jul 2014 22:35:45 +0200 Subject: i82801ix: Allow configuration of SATA mode in CMOS. Change-Id: Ice0f0273b16a946143c038a90b61978269c1c56e Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/6409 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Paul Menzel --- src/mainboard/roda/rk9/cmos.layout | 5 ++++- src/mainboard/roda/rk9/devicetree.cb | 1 - 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src/mainboard/roda/rk9') diff --git a/src/mainboard/roda/rk9/cmos.layout b/src/mainboard/roda/rk9/cmos.layout index 8f12ef4260..ca439c9288 100644 --- a/src/mainboard/roda/rk9/cmos.layout +++ b/src/mainboard/roda/rk9/cmos.layout @@ -85,7 +85,8 @@ entries #400 8 r 0 unused # coreboot config options: southbridge -#408 8 r 0 unused +408 1 e 9 sata_mode +#409 7 r 0 unused # coreboot config options: bootloader 416 512 s 0 boot_devices @@ -133,6 +134,8 @@ enumerations 7 2 Keep 8 0 No 8 1 Yes +9 0 AHCI +9 1 Compatible # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index 5989278ebc..deece864e6 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -44,7 +44,6 @@ chip northbridge/intel/gm45 register "alt_gp_smi_en" = "0x0002" # Set AHCI mode, enable ports 1 and 2. - register "sata_ahci" = "1" register "sata_port_map" = "0x03" register "sata_clock_request" = "0" register "sata_traffic_monitor" = "0" -- cgit v1.2.3