From 44e89af6e609874f2f18d30f1e66dce8b5a98eff Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 23 Feb 2019 19:24:51 +0100 Subject: soc/intel/skylake: Unify serial IRQ options We had two ways to configure the serial IRQ mode. One time in the devicetree for FSP and one time through Kconfig for coreboot. We'll use `enum serirq_mode` from soc/intel/common/ as a devicetree option instead. As the default is `quiet mode` here and that is the most common mode, this saves us a lot of lines. In four cases kblrvp8, 11 and librem 13v2, 15v3, we had conflicting settings in devicetree and Kconfig. We'll maintain the `continuous` selection, although it might be that coreboot overrode this earlier on the kblrvps. Note: A lot of Google boards have serial IRQ enabled, while the pin seems to be unconnected? Change-Id: I79f0cd302e335d8dcf8bf6bc32f3d40ca6713e5c Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/31596 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Matt DeVillier Reviewed-by: Furquan Shaikh --- src/mainboard/purism/librem_skl/Kconfig | 2 -- src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 4 +++- src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 4 +++- 3 files changed, 6 insertions(+), 4 deletions(-) (limited to 'src/mainboard/purism') diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig index b3413b73d5..965318f565 100644 --- a/src/mainboard/purism/librem_skl/Kconfig +++ b/src/mainboard/purism/librem_skl/Kconfig @@ -6,8 +6,6 @@ config BOARD_PURISM_BASEBOARD_LIBREM_SKL select HAVE_ACPI_TABLES select INTEL_LPSS_UART_FOR_CONSOLE select SOC_INTEL_SKYLAKE - # Workaround for EC/KBC IRQ1 - select SERIRQ_CONTINUOUS_MODE select MAINBOARD_USES_FSP2_0 select SPD_READ_BY_WORD select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index 399c6432a1..8d2a436a5a 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -61,13 +61,15 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "3" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "0" + # EC/KBC requires continuous mode + register "serirq_mode" = "SERIRQ_CONTINUOUS" + register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" register "pirqc_routing" = "PCH_IRQ11" diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index f9f7ef7e53..49af7b69f1 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -61,13 +61,15 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "3" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "0" + # EC/KBC requires continuous mode + register "serirq_mode" = "SERIRQ_CONTINUOUS" + register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" register "pirqc_routing" = "PCH_IRQ11" -- cgit v1.2.3