From 54e0fd21b1f916a3f152114027db1029a921fc55 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 29 Oct 2020 20:30:08 -0500 Subject: mb/purism/librem_whl: rename to librem_cnl MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since Whiskeylake SoC code is actually a subset of soc/intel/cannonlake, rename the baseboard so that boards using other 'cannonlake family' SoCs (e.g., Cometlake) can be added with minimal confusion. Rename the mainboard dir and baseboard name, and adjust any references to them. Change-Id: I2af7977f1622070eb8bf8449bc8306f9d75b9851 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/47050 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber Reviewed-by: Angel Pons --- src/mainboard/purism/librem_cnl/Kconfig | 62 +++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 src/mainboard/purism/librem_cnl/Kconfig (limited to 'src/mainboard/purism/librem_cnl/Kconfig') diff --git a/src/mainboard/purism/librem_cnl/Kconfig b/src/mainboard/purism/librem_cnl/Kconfig new file mode 100644 index 0000000000..38be3806d5 --- /dev/null +++ b/src/mainboard/purism/librem_cnl/Kconfig @@ -0,0 +1,62 @@ +config BOARD_PURISM_BASEBOARD_LIBREM_CNL + def_bool n + select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GENERIC_CBFS_SERIAL + select DRIVERS_USB_ACPI + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select INTEL_GMA_HAVE_VBT + select NO_UART_ON_SUPERIO + select SOC_INTEL_COMMON_BLOCK_HDA + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + select SOC_INTEL_WHISKEYLAKE + select SPD_READ_BY_WORD + select USE_LEGACY_8254_TIMER + +if BOARD_PURISM_BASEBOARD_LIBREM_CNL + +config MAINBOARD_DIR + string + default "purism/librem_cnl" + +config MAINBOARD_FAMILY + string + default "Librem Mini" if BOARD_PURISM_LIBREM_MINI + +config MAINBOARD_PART_NUMBER + string + default "Librem Mini" if BOARD_PURISM_LIBREM_MINI + +config VARIANT_DIR + string + default "librem_mini" if BOARD_PURISM_LIBREM_MINI + +config CBFS_SIZE + hex + default 0x800000 + +config MAX_CPUS + int + default 8 + +config DIMM_MAX + int + default 2 + +config DIMM_SPD_SIZE + int + default 512 + +config VGA_BIOS_ID + string + default "8086,3ea0" + +config PXE_ROM_ID + string + default "10ec,8168" + +# This platform has limited means to display POST codes +config NO_POST + default y + +endif -- cgit v1.2.3