From 48be6b276a0d7d0376684eaa5c1d92b763f61cc6 Mon Sep 17 00:00:00 2001
From: Michał Żygowski <michal.zygowski@3mdeb.com>
Date: Thu, 27 Jun 2019 12:19:18 +0200
Subject: mb/protectli/vault_kbl: Add FW6 support
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Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I03e8e8db5d827fe113280f2a6376d364edf42870
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
---
 src/mainboard/protectli/vault_kbl/bootblock.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 src/mainboard/protectli/vault_kbl/bootblock.c

(limited to 'src/mainboard/protectli/vault_kbl/bootblock.c')

diff --git a/src/mainboard/protectli/vault_kbl/bootblock.c b/src/mainboard/protectli/vault_kbl/bootblock.c
new file mode 100644
index 0000000000..125f9bfa5e
--- /dev/null
+++ b/src/mainboard/protectli/vault_kbl/bootblock.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* This file is part of the coreboot project. */
+
+#include <bootblock_common.h>
+#include <superio/ite/it8772f/it8772f.h>
+#include <superio/ite/common/ite.h>
+
+#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO)
+#define UART_DEV PNP_DEV(0x2e, IT8772F_SP1)
+
+void bootblock_mainboard_early_init(void)
+{
+	ite_conf_clkin(GPIO_DEV, ITE_UART_CLK_PREDIVIDE_24);
+	ite_enable_3vsbsw(GPIO_DEV);
+	ite_kill_watchdog(GPIO_DEV);
+	ite_enable_serial(UART_DEV, CONFIG_TTYS0_BASE);
+}
-- 
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