From b646e28769f27ee2812925f63fe2f73c67e23c9e Mon Sep 17 00:00:00 2001 From: Christian Walter Date: Thu, 9 Jan 2020 15:42:42 +0100 Subject: mb/prodrive/hermes: Add new mainboard port This patch adds support for the Prodrive Hermes mainboard. Tested with CoffeeLakeFspBinPkg FSP 7.0.68.41. Untested: * CNVi * Intel Graphics Tested: * CPU Intel Xeon E2288G * CPU Intel Core i3-9100F * CPU Intel Core i7 9700KF * CPU Intel Core i7 9700E * CPU Intel Core i7 9700F * CPU Intel Core i5 9600K * CPU Intel Pentium Gold G5400 * PCIe Link Width x8 on Slot6 by changing PCIe mux * All four DDR4 slots in different configurations * USB2.0 HDR1 * USB2.0 HDR2 * USB3.0 HDR * Slot1 * Slot2 * Slot3 * Slot4 * Slot6 * M2.M NVMEe * Ethernet PHYs 0-4 * Aspeed BMC PCIe * Aspeed BMC USB * Aspeed Graphics init * USB3 backplane all working * I801 SMBUS Not Working: * Intel HDA Change-Id: Id7d051d3fa6823618691d5572087c9ae589c2862 Signed-off-by: Christian Walter Signed-off-by: Patrick Rudolph Signed-off-by: Christian Walter Reviewed-on: https://review.coreboot.org/c/coreboot/+/38303 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/prodrive/hermes/eeprom.c | 67 ++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 src/mainboard/prodrive/hermes/eeprom.c (limited to 'src/mainboard/prodrive/hermes/eeprom.c') diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c new file mode 100644 index 0000000000..bd5db5c851 --- /dev/null +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include "variants/baseboard/include/eeprom.h" + +/* + * Check Signature in EEPROM (M24C32-FMN6TP) + * If signature is there we assume that that the content is valid + */ +int check_signature(u8 addr) +{ + u8 blob[8] = {0}; + + if (!read_write_config(addr, blob, EEPROM_OFFSET_FSP_SIGNATURE, 0, ARRAY_SIZE(blob))) { + // Check Signature + if (*(uint64_t *)blob == FSP_UPD_SIGNATURE) { + printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n"); + return 1; + } + printk(BIOS_DEBUG, "CFG EEPROM: Signature invalid - skipping option write.\n"); + return 0; + } + return 0; +} + +// Read data from offset and write it to offset in UPD +bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_offset, + size_t size) +{ + int ret = 0; + +#if ENV_ROMSTAGE + pci_devfn_t dev = PCI_DEV(0, PCH_DEV_SLOT_LPC, 4); +#else + const struct device *dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 4); +#endif + + u32 smb_ctrl_reg = pci_read_config32(dev, HOSTC); + pci_write_config32(dev, HOSTC, smb_ctrl_reg | HOSTC_I2C_EN); + + printk(BIOS_SPEW, "%s\tOffset: %04zx\tSize: %02zx\n", __func__, + read_offset, size); + + /* We can always read two bytes at a time */ + for (size_t i = 0; i < size; i = i + 2) { + u8 tmp[2] = {0}; + + ret = do_smbus_process_call(SMBUS_IO_BASE, addr, 0, + swab16(read_offset + i), (uint16_t *)&tmp[0]); + if (ret < 0) + break; + + // Write to UPD + uint8_t *writePointer = (uint8_t *)blob + write_offset + i; + if (size > 1 && (size % 2 == 0)) + memcpy(writePointer, tmp, 2); + else + *writePointer = tmp[0]; + } + + /* Restore I2C_EN bit */ + pci_write_config32(dev, HOSTC, smb_ctrl_reg); + + return ret; +} -- cgit v1.2.3