From c04871a398ca945b42fde0867572094c38f6f92c Mon Sep 17 00:00:00 2001 From: Michał Żygowski Date: Fri, 20 Mar 2020 16:14:36 +0100 Subject: mb/pcengines/apu2: add reset logic for PCIe slots MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PC Engines apu2 had many problems with PCIe cards detection. The cards were inconsistently detected when booted from G3, S5 or after a reboot. AGESA can reset PCIe slots using GPIO via callback. Use it to reset the slots that support using GPIO as reset signal. Signed-off-by: Michał Żygowski Change-Id: I8ff7db6ff85cce45b84729be905e6c895a24f6f2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39703 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/pcengines/apu2/romstage.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/mainboard/pcengines/apu2/romstage.c') diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 7565bfca1d..34c42b43ff 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -38,6 +38,15 @@ void board_BeforeAgesa(struct sysinfo *cb) /* Release GPIO32/33 for other uses. */ pm_write8(0xea, 1); + + /* + * Assert resets on the PCIe slots, since AGESA calls deassert callout + * only. Only apu2 uses GPIOs to reset PCIe slots. + */ + if (CONFIG(BOARD_PCENGINES_APU2)) { + gpio1_write8(0xa, gpio1_read8(0xa) & ~(1 << 6)); + gpio1_write8(0xe, gpio1_read8(0xe) & ~(1 << 6)); + } } static void early_lpc_init(void) -- cgit v1.2.3