From 07354235df303c0c1ea3845f5325993a089b4150 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 17 Jan 2015 18:08:40 +0200 Subject: pcengines/apu1: Fix and clean up devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove functions 0:12.1 and 0:13.1 that do not exist in the hardware. Disable 0:14.1 IDE controller, as it would only be used with SATA ports 4 and 5 that are not populated with connectors in the hardware. Disable 0:14.2 HD audio, as it is not implemented in the hardware Disable 0:14.5 OHCI controller, as ports behind this USB1.1 -only controller are not populated in the hardware. Fix some alignment and whitespace. To my knowledge these changes are not included with SAGE release pcengines.apu_139_osp.tar.gz, but that tarball does not contain either devicetree.cb or a pre-compiled static.c file so I cannot tell for sure. Change-Id: Idcb8e76645fce7e89a37ff7007531b668f472131 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8328 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/mainboard/pcengines/apu1/mptable.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src/mainboard/pcengines/apu1/mptable.c') diff --git a/src/mainboard/pcengines/apu1/mptable.c b/src/mainboard/pcengines/apu1/mptable.c index 18bdb97d30..03fa9f37d6 100644 --- a/src/mainboard/pcengines/apu1/mptable.c +++ b/src/mainboard/pcengines/apu1/mptable.c @@ -114,17 +114,6 @@ static void *smp_write_config_table(void *v) PCI_INT(0x3, 0x0, 0x0, intr_data_ptr[PIRQ_E]); /* Use INTE */ PCI_INT(0x4, 0x0, 0x0, intr_data_ptr[PIRQ_E]); /* Use INTE */ - /* PCI slots */ - device_t dev = dev_find_slot(0, PCI_DEVFN(0x14, 4)); - if (dev && dev->enabled) { - u8 bus_pci = dev->link_list->secondary; - /* PCI_SLOT 0 */ - PCI_INT(bus_pci, 0x5, 0x0, intr_data_ptr[PIRQ_E]); /* INTA -> INTE */ - PCI_INT(bus_pci, 0x5, 0x1, intr_data_ptr[PIRQ_F]); /* INTB -> INTF */ - PCI_INT(bus_pci, 0x5, 0x2, intr_data_ptr[PIRQ_G]); /* INTC -> INTG */ - PCI_INT(bus_pci, 0x5, 0x3, intr_data_ptr[PIRQ_H]); /* INTD -> INTH */ - } - /* PCIe PortA */ PCI_INT(0x0, 0x15, 0x0, intr_data_ptr[PIRQ_E]); /* INTA -> INTE */ /* PCIe PortB */ -- cgit v1.2.3