From 46731237ceca6162302e23f535dc886ac171b6e6 Mon Sep 17 00:00:00 2001 From: Maxime de Roucy Date: Sun, 27 Sep 2015 15:45:35 +0200 Subject: pcengines/apu1: Add CMOS/NVRAM support Inspired by the Sage source code (itself from coreboot). Change-Id: I4864923166efb200882d895c572d1ee060c71951 Signed-off-by: Maxime de Roucy Reviewed-on: http://review.coreboot.org/11730 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/mainboard/pcengines/apu1/cmos.layout | 46 ++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 src/mainboard/pcengines/apu1/cmos.layout (limited to 'src/mainboard/pcengines/apu1/cmos.layout') diff --git a/src/mainboard/pcengines/apu1/cmos.layout b/src/mainboard/pcengines/apu1/cmos.layout new file mode 100644 index 0000000000..0cf145f258 --- /dev/null +++ b/src/mainboard/pcengines/apu1/cmos.layout @@ -0,0 +1,46 @@ +entries + +# +0 384 r 0 reserved_memory +384 4 r 0 reboot_bits +388 1 e 2 last_boot +# leave 3 bits to make checksummed area start byte-aligned +392 1 e 2 boot_option +393 1 e 1 multi_core +394 3 e 3 baud_rate +397 4 e 4 debug_level +# leave 7 bits to make checksummed area end byte-aligned +408 16 h 0 check_sum + +enumerations + +#