From e1c36aecd8c5ad580595da58e180b06195df5f00 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 13 Oct 2015 15:01:15 +0300 Subject: pcengines/apu1: Add RS485 configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In RS485 mode RTS line acts as a transceiver direction control. The datasheet is not very clear about the polarity but register setting here is tested to drive nRTS line high when transmitting. Also note revision of B of the super-IO has errata and 8N1 setting does not work properly, you would need revision C of the chip assembled to fix this. Change-Id: I705fe0c5a5f8369b0a9358a64c74500238b5c4ba Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/14998 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Felix Held --- src/mainboard/pcengines/apu1/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/mainboard/pcengines/apu1/Kconfig') diff --git a/src/mainboard/pcengines/apu1/Kconfig b/src/mainboard/pcengines/apu1/Kconfig index e9aab8cbfe..3099d14386 100644 --- a/src/mainboard/pcengines/apu1/Kconfig +++ b/src/mainboard/pcengines/apu1/Kconfig @@ -95,6 +95,9 @@ config APU1_PINMUX_UART_C endchoice +config UART_C_RS485 + bool "UART C drives RTS# in RS485 mode" if APU1_PINMUX_UART_C + choice prompt "J19 pins 11-20" default APU1_PINMUX_OFF_D @@ -110,4 +113,7 @@ config APU1_PINMUX_UART_D endchoice +config UART_D_RS485 + bool "UART D drives RTS# in RS485 mode" if APU1_PINMUX_UART_D + endif # BOARD_PCENGINES_APU1 -- cgit v1.2.3