From a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 14 Aug 2014 08:35:11 -0500 Subject: intel/cpu: rename car.h to romstage.h This header has nothing to do with cache-as-ram. Therefore, 'car' is the wrong term to use. It is about providing a prototype for *romstage*. Change-Id: Ibc5bc6f3c38e74d6337c12f246846853ceae4743 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/6661 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/pcengines/alix1c/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/pcengines/alix1c') diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 436edc0d63..4f80550713 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -107,7 +107,7 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include +#include void main(unsigned long bist) { static const struct mem_controller memctrl[] = { -- cgit v1.2.3