From 0c781b2694b2c137d9761704954ea38be5ba8a15 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 1 Apr 2010 09:50:32 +0000 Subject: - get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files. - start naming all versions of post code output "post_code()" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/pcengines/alix1c/romstage.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/mainboard/pcengines/alix1c/romstage.c') diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 236e530258..1ba4440324 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -33,7 +33,6 @@ #include #include "southbridge/amd/cs5536/cs5536.h" -#define POST_CODE(x) outb(x, 0x80) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX1.C has no SMBus; the setup is hard-wired. */ @@ -148,7 +147,7 @@ void cache_as_ram_main(void) extern void RestartCAR(); - POST_CODE(0x01); + post_code(0x01); SystemPreInit(); msr_init(); @@ -195,7 +194,7 @@ void cache_as_ram_main(void) * * We use method 1 on Norwich and on this board too. */ - POST_CODE(0x02); + post_code(0x02); print_err("POST 02\n"); __asm__("wbinvd\n"); print_err("Past wbinvd\n"); -- cgit v1.2.3