From 8431fcb8c8e248d777723e0a6651b9030d29cf8e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Fri, 17 Jun 2016 10:00:28 +0300
Subject: intel/model_2065x: Prepare for dynamic CONFIG_RAMTOP
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Change-Id: I616143b55d7c5726dc2475434e3fcb08b8d69bda
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15230
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/mainboard/packardbell/ms2290/romstage.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

(limited to 'src/mainboard/packardbell/ms2290')

diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c
index e8f625d97a..d46a768f4b 100644
--- a/src/mainboard/packardbell/ms2290/romstage.c
+++ b/src/mainboard/packardbell/ms2290/romstage.c
@@ -28,12 +28,12 @@
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
+#include <cpu/intel/romstage.h>
 #include <ec/acpi/ec.h>
 #include <delay.h>
 #include <timestamp.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
-#include <cpu/intel/romstage.h>
 
 #include "arch/early_variables.h"
 #include <southbridge/intel/ibexpeak/pch.h>
@@ -166,8 +166,7 @@ static inline u16 read_acpi16(u32 addr)
 }
 #endif
 
-#include <cpu/intel/romstage.h>
-void main(unsigned long bist)
+void mainboard_romstage_entry(unsigned long bist)
 {
 	u32 reg32;
 	int s3resume = 0;
-- 
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