From c7b63edeb47963ae97aa3478d45aaa8f4fa0cdf0 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 16 Dec 2020 08:31:45 +0100 Subject: mb/ocp/tiogapass/devicetree.cb: Add P2SB device This fixes ocp/tiagopass not booting as after FSP-S the P2SB is accessed to read out or reconfigure the HPET and PCH IOAPIC BDF. Change-Id: Ia37bd0f14627980345cd07f20e935a10d4760b69 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/48654 Reviewed-by: Marc Jones Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/ocp/tiogapass/devicetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/ocp/tiogapass') diff --git a/src/mainboard/ocp/tiogapass/devicetree.cb b/src/mainboard/ocp/tiogapass/devicetree.cb index 008633b1a1..488f677a95 100644 --- a/src/mainboard/ocp/tiogapass/devicetree.cb +++ b/src/mainboard/ocp/tiogapass/devicetree.cb @@ -77,6 +77,7 @@ chip soc/intel/xeon_sp/skx register "bmc_boot_timeout" = "90" end end # Intel Corporation C621 Series Chipset LPC/eSPI Controller + device pci 1f.1 hidden end # p2sb device pci 1f.2 on end # Intel Corporation C620 Series Chipset Family Power Management Controller device pci 1f.4 on end # Intel Corporation C620 Series Chipset Family SMBus device pci 1f.5 on end # Intel Corporation C620 Series Chipset Family SPI Controller -- cgit v1.2.3