From 13c44457f1392d3074b126d9c29a722ea130db8c Mon Sep 17 00:00:00 2001 From: Tim Chu Date: Fri, 25 Nov 2022 10:31:00 +0000 Subject: soc/intel/xeon_sp: Move codes to support new PCH Different PCHs have different definitions for registers. Here create a lbg folder and move lbg specific codes to this folder so that we can add new PCH code under xeon_sp folder. * Create lbg folder and move lbg specific codes from pch.c to soc_pch.c under lbg folder. * Rename lewisburg_pch_gpio_defs.h to gpio_soc_defs.h and move to lbg folder. * Rename gpio.c to soc_gpio.c and move to lbg folder. * Move pcr_ids.h to lbg folder. * Move lbg specific codes from pmutil.c to soc_pmutil.c under lbg folder. * Create and revise makefile for files under lbg folder. TEST=Can boot into OS on OCP Delta Lake. Signed-off-by: Tim Chu Change-Id: I06555ed6612c632ea2ce1938d81781cd9348017a Reviewed-on: https://review.coreboot.org/c/coreboot/+/70009 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/ocp/tiogapass/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/ocp/tiogapass') diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c index 842e977d3e..c3e716527a 100644 --- a/src/mainboard/ocp/tiogapass/romstage.c +++ b/src/mainboard/ocp/tiogapass/romstage.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include "ipmi.h" -- cgit v1.2.3