From b75bcc978af50dc409b5356abd33b064029480bb Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Sun, 22 Mar 2020 22:16:03 -0700 Subject: mb/ocp/tiogapass: Properly configure early serial output Tioga Pass comes with AST2500 BMC which offers SuperIO functionality. However we currently do not configure/enable SuperIO chip. As a result system boots pretty silently on cold boot. Then FSP configures SuperIO and resets the system so on next boot serial console does work. This makes debugging difficult because pre-FSP output is invisible. This patch enables bootblock to properly configure desired BMC SuperIO port so early serial output is visible. TEST=do a cold boot on OCP Tioga Pass, observe bootblock output starting from bootblock. Change-Id: Iff8e6a862858d733f529bb9b8c65e22e5ec6b521 Signed-off-by: Andrey Petrov Reviewed-on: https://review.coreboot.org/c/coreboot/+/39782 Tested-by: build bot (Jenkins) Reviewed-by: Maxim Polyakov --- src/mainboard/ocp/tiogapass/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/ocp/tiogapass/Kconfig') diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 1d501e6db0..f9b5e7f48a 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_USES_FSP2_0 select IPMI_KCS select SOC_INTEL_SKYLAKE_SP + select SUPERIO_ASPEED_AST2400 config MAINBOARD_DIR string -- cgit v1.2.3